From 024086cfb9c965abc579aa7fb5efc3e63d39c6b5 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sat, 1 Aug 2020 08:00:18 +0200
Subject: vhdl: parse and analyze force/release signal assignment statements.

For #1416
---
 src/vhdl/vhdl-nodes_walk.adb | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/vhdl/vhdl-nodes_walk.adb')

diff --git a/src/vhdl/vhdl-nodes_walk.adb b/src/vhdl/vhdl-nodes_walk.adb
index 613e2c6b1..79b67cc13 100644
--- a/src/vhdl/vhdl-nodes_walk.adb
+++ b/src/vhdl/vhdl-nodes_walk.adb
@@ -63,6 +63,8 @@ package body Vhdl.Nodes_Walk is
          when Iir_Kind_Simple_Signal_Assignment_Statement
            | Iir_Kind_Conditional_Signal_Assignment_Statement
            | Iir_Kind_Selected_Waveform_Assignment_Statement
+           | Iir_Kind_Signal_Force_Assignment_Statement
+           | Iir_Kind_Signal_Release_Assignment_Statement
            | Iir_Kind_Null_Statement
            | Iir_Kind_Assertion_Statement
            | Iir_Kind_Report_Statement
-- 
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