From 21af50dafb4f0fa27a6d8757e3953f310d0e3e8f Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Mon, 1 Jun 2020 10:21:43 +0200
Subject: vhdl: parse PSL prev/stable/rose/fell builtin calls.  For #662

---
 src/vhdl/vhdl-errors.adb | 8 ++++++++
 1 file changed, 8 insertions(+)

(limited to 'src/vhdl/vhdl-errors.adb')

diff --git a/src/vhdl/vhdl-errors.adb b/src/vhdl/vhdl-errors.adb
index dfae1afe8..4e693e932 100644
--- a/src/vhdl/vhdl-errors.adb
+++ b/src/vhdl/vhdl-errors.adb
@@ -782,6 +782,14 @@ package body Vhdl.Errors is
             return "PSL restrict";
          when Iir_Kind_Psl_Default_Clock =>
             return "PSL default clock";
+         when Iir_Kind_Psl_Prev =>
+            return "PSL prev function";
+         when Iir_Kind_Psl_Stable =>
+            return "PSL stable function";
+         when Iir_Kind_Psl_Rose =>
+            return "PSL rose function";
+         when Iir_Kind_Psl_Fell =>
+            return "PSL fell function";
 
          when Iir_Kind_If_Statement =>
             return Disp_Label (Node, "if statement");
-- 
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