From 46256fac0b1bf55c61deba39a368f53a2297b583 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Thu, 4 Nov 2021 07:34:04 +0100 Subject: vhdl: parse PSL inherit spec. For #1899 --- src/vhdl/vhdl-elocations.adb | 1 + 1 file changed, 1 insertion(+) (limited to 'src/vhdl/vhdl-elocations.adb') diff --git a/src/vhdl/vhdl-elocations.adb b/src/vhdl/vhdl-elocations.adb index 9736cb92f..657e7921c 100644 --- a/src/vhdl/vhdl-elocations.adb +++ b/src/vhdl/vhdl-elocations.adb @@ -210,6 +210,7 @@ package body Vhdl.Elocations is | Iir_Kind_Foreign_Module | Iir_Kind_Use_Clause | Iir_Kind_Context_Reference + | Iir_Kind_PSL_Inherit_Spec | Iir_Kind_Integer_Literal | Iir_Kind_Floating_Point_Literal | Iir_Kind_Null_Literal -- cgit v1.2.3