From e5cf1849821cec0f3340babf69c29929d1d25fca Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Thu, 15 Apr 2021 07:24:57 +0200 Subject: vhdl-canon_psl: handle imp_bool --- src/vhdl/vhdl-canon_psl.adb | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'src/vhdl/vhdl-canon_psl.adb') diff --git a/src/vhdl/vhdl-canon_psl.adb b/src/vhdl/vhdl-canon_psl.adb index 391592be7..daffa2a42 100644 --- a/src/vhdl/vhdl-canon_psl.adb +++ b/src/vhdl/vhdl-canon_psl.adb @@ -27,11 +27,12 @@ package body Vhdl.Canon_PSL is begin case Get_Kind (Expr) is when N_HDL_Expr - | N_HDL_Bool => + | N_HDL_Bool => Canon_Extract_Sensitivity_Expression (Get_HDL_Node (Expr), Sensitivity_List); when N_And_Bool - | N_Or_Bool => + | N_Or_Bool + | N_Imp_Bool => Canon_Extract_Sensitivity (Get_Left (Expr), Sensitivity_List); Canon_Extract_Sensitivity (Get_Right (Expr), Sensitivity_List); when N_Not_Bool => -- cgit v1.2.3