From ff3105a7a8b8298771c64fd13171e33385f6fcc8 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Wed, 13 Oct 2021 20:21:22 +0200
Subject: synth: add support for sequence instance in vunit.  Fix #1889

---
 src/vhdl/vhdl-annotations.adb | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/vhdl/vhdl-annotations.adb')

diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb
index 36a61238e..fae87203a 100644
--- a/src/vhdl/vhdl-annotations.adb
+++ b/src/vhdl/vhdl-annotations.adb
@@ -1138,7 +1138,8 @@ package body Vhdl.Annotations is
       Item := Get_Vunit_Item_Chain (Decl);
       while Item /= Null_Iir loop
          case Get_Kind (Item) is
-            when Iir_Kind_Psl_Default_Clock =>
+            when Iir_Kind_Psl_Default_Clock
+              | Iir_Kind_Psl_Declaration =>
                null;
             when Iir_Kind_Psl_Assert_Directive
                | Iir_Kind_Psl_Assume_Directive
-- 
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