From f911b6b97b379415eb5620d29d4579541bb5facd Mon Sep 17 00:00:00 2001 From: tmeissner Date: Mon, 25 Oct 2021 11:56:23 +0200 Subject: synth: Support alias declarations in vunit --- src/vhdl/vhdl-annotations.adb | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/vhdl/vhdl-annotations.adb') diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index 9daa19abc..a1d8c7611 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -1167,7 +1167,9 @@ package body Vhdl.Annotations is | Iir_Kind_Function_Body | Iir_Kind_Procedure_Body | Iir_Kind_Attribute_Declaration - | Iir_Kind_Attribute_Specification => + | Iir_Kind_Attribute_Specification + | Iir_Kind_Object_Alias_Declaration + | Iir_Kind_Non_Object_Alias_Declaration => Annotate_Declaration (Vunit_Info, Item); when Iir_Kinds_Concurrent_Signal_Assignment | Iir_Kinds_Process_Statement -- cgit v1.2.3