From ce3659abec1037f8dc4ad62eecdaba08884ce348 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Mon, 11 Dec 2017 18:41:42 +0100 Subject: simul: Check range of the result of concat operator. --- src/vhdl/simulate/simul-execution.adb | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) (limited to 'src/vhdl/simulate/simul-execution.adb') diff --git a/src/vhdl/simulate/simul-execution.adb b/src/vhdl/simulate/simul-execution.adb index b953d6d51..2eb890c54 100644 --- a/src/vhdl/simulate/simul-execution.adb +++ b/src/vhdl/simulate/simul-execution.adb @@ -657,6 +657,10 @@ package body Simul.Execution is Eval_Right; declare + -- Type of the index. + Idx_Type : constant Iir := + Get_Nth_Element (Get_Index_Subtype_List (Res_Type), 0); + -- Array length of the result. Len: Iir_Index32; @@ -714,10 +718,10 @@ package body Simul.Execution is -- Create the array result. Result := Create_Array_Value (Len, 1); Result.Bounds.D (1) := Create_Bounds_From_Length - (Block, - Get_Nth_Element (Get_Index_Subtype_List (Res_Type), 0), - Len); + (Block, Idx_Type, Len); end if; + Check_Range_Constraints + (Block, Result.Bounds.D (1), Idx_Type, Expr); -- Fill the result: left. case Func is @@ -3868,6 +3872,17 @@ package body Simul.Execution is Value := Ref_Value; end Implicit_Array_Conversion; + procedure Check_Range_Constraints (Instance : Block_Instance_Acc; + Rng : Iir_Value_Literal_Acc; + Rng_Type : Iir; + Loc : Iir) is + begin + if not Is_Null_Range (Rng) then + Check_Constraints (Instance, Rng.Left, Get_Type (Rng_Type), Loc); + Check_Constraints (Instance, Rng.Right, Get_Type (Rng_Type), Loc); + end if; + end Check_Range_Constraints; + procedure Check_Array_Constraints (Instance: Block_Instance_Acc; Value: Iir_Value_Literal_Acc; -- cgit v1.2.3