From 688173587e76ee89b67b0c0aeb93385c0db08b22 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Thu, 4 Jul 2019 18:20:30 +0200
Subject: vhdl: rename Cover_Statement to Cover_Directive.

---
 src/vhdl/simulate/simul-elaboration.adb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/vhdl/simulate/simul-elaboration.adb')

diff --git a/src/vhdl/simulate/simul-elaboration.adb b/src/vhdl/simulate/simul-elaboration.adb
index d1c62a2a5..fe89d48c7 100644
--- a/src/vhdl/simulate/simul-elaboration.adb
+++ b/src/vhdl/simulate/simul-elaboration.adb
@@ -1898,7 +1898,7 @@ package body Simul.Elaboration is
               | Iir_Kind_Psl_Declaration =>
                null;
 
-            when Iir_Kind_Psl_Cover_Statement
+            when Iir_Kind_Psl_Cover_Directive
               | Iir_Kind_Psl_Assert_Statement
               | Iir_Kind_Psl_Endpoint_Declaration =>
                Elaborate_Psl_Directive (Instance, Stmt);
-- 
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