From e5f5c65f8471071ca52462d81d0cadc2d5c16950 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sat, 20 Jul 2019 21:25:18 +0200
Subject: synth: improve output (id_extract).

---
 src/synth/netlists-disp_vhdl.adb | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

(limited to 'src/synth')

diff --git a/src/synth/netlists-disp_vhdl.adb b/src/synth/netlists-disp_vhdl.adb
index c05e1ade2..4e180d7f7 100644
--- a/src/synth/netlists-disp_vhdl.adb
+++ b/src/synth/netlists-disp_vhdl.adb
@@ -508,16 +508,22 @@ package body Netlists.Disp_Vhdl is
          when Id_Extract =>
             declare
                O : constant Net := Get_Output (Inst, 0);
+               I : constant Net := Get_Input_Net (Inst, 0);
                Wd : constant Width := Get_Width (O);
                Off : constant Uns32 := Get_Param_Uns32 (Inst, 0);
             begin
-               Disp_Template ("  \o0 <= \i0 (", Inst);
-               if Wd > 1 then
-                  Put_Uns32 (Off + Wd - 1);
-                  Put (" downto ");
+               Disp_Template ("  \o0 <= \i0", Inst);
+               if Get_Width (I) > 1 then
+                  --  If width is 1, the signal is declared as a scalar and
+                  --  therefore cannot be indexed.
+                  if Wd > 1 then
+                     Disp_Template (" (\n0 downto \n1)", Inst,
+                                    (0 => Off + Wd - 1, 1 => Off));
+                  else
+                     Disp_Template (" (\n0)", Inst, (0 => Off));
+                  end if;
                end if;
-               Put_Uns32 (Off);
-               Put_Line (");");
+               Put_Line (";");
             end;
          when Id_Insert =>
             declare
-- 
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