From 604d6b287ec456f83826d7b2062876ad2298ebdc Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Wed, 8 Sep 2021 18:08:26 +0200 Subject: vhdl: allow constants in vunit declarations. Fix #1856 --- src/synth/synth-vhdl_stmts.adb | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/synth') diff --git a/src/synth/synth-vhdl_stmts.adb b/src/synth/synth-vhdl_stmts.adb index d827311e2..25e37be8f 100644 --- a/src/synth/synth-vhdl_stmts.adb +++ b/src/synth/synth-vhdl_stmts.adb @@ -3836,6 +3836,7 @@ package body Synth.Vhdl_Stmts is when Iir_Kind_Psl_Cover_Directive => Synth_Psl_Cover_Directive (Unit_Inst, Item); when Iir_Kind_Signal_Declaration + | Iir_Kind_Constant_Declaration | Iir_Kind_Function_Declaration | Iir_Kind_Procedure_Declaration | Iir_Kind_Function_Body @@ -3876,6 +3877,7 @@ package body Synth.Vhdl_Stmts is | Iir_Kind_Component_Instantiation_Statement => null; when Iir_Kind_Signal_Declaration + | Iir_Kind_Constant_Declaration | Iir_Kind_Function_Declaration | Iir_Kind_Procedure_Declaration | Iir_Kind_Function_Body -- cgit v1.2.3