From 365d6b03e6045059c2813fe24204ee0b6e571045 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Tue, 10 Mar 2020 20:36:07 +0100
Subject: synth: handle memories in inout variable parameter.

---
 src/synth/netlists-expands.adb |  8 ++++++--
 src/synth/synth-stmts.adb      | 30 ++++++++++++++++++------------
 2 files changed, 24 insertions(+), 14 deletions(-)

(limited to 'src/synth')

diff --git a/src/synth/netlists-expands.adb b/src/synth/netlists-expands.adb
index a7afdda01..37ff24bf7 100644
--- a/src/synth/netlists-expands.adb
+++ b/src/synth/netlists-expands.adb
@@ -151,8 +151,12 @@ package body Netlists.Expands is
          Res_Arr (P) := Get_Driver (Inp);
          P := P + 1;
 
-         Disconnect (Inp);
-         Remove_Instance (Inst1);
+         if not Is_Connected (Get_Output (Inst1, 0)) then
+            --  A memidx can be shared between several insert/extract.
+            --  FIXME: what about memidx ?
+            Disconnect (Inp);
+            Remove_Instance (Inst1);
+         end if;
 
          exit when Inst1 = Inst;
       end loop;
diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb
index 935cc3b8b..7b2213301 100644
--- a/src/synth/synth-stmts.adb
+++ b/src/synth/synth-stmts.adb
@@ -537,14 +537,18 @@ package body Synth.Stmts is
    is
       N : Net;
    begin
-      if Targ.Kind = Target_Simple then
-         N := Build2_Extract (Get_Build (Syn_Inst),
-                              Get_Net (Targ.Obj), Targ.Off, Targ.Targ_Type.W);
-         return Create_Value_Net (N, Targ.Targ_Type);
-      else
-         return Synth_Read_Memory (Syn_Inst, Targ.Obj, Targ.Off, No_Net,
-                                   Targ.Targ_Type, Loc);
-      end if;
+      case Targ.Kind is
+         when Target_Simple =>
+            N := Build2_Extract
+              (Get_Build (Syn_Inst),
+               Get_Net (Targ.Obj), Targ.Off, Targ.Targ_Type.W);
+            return Create_Value_Net (N, Targ.Targ_Type);
+         when Target_Aggregate =>
+            raise Internal_Error;
+         when Target_Memory =>
+            return Synth_Read_Memory (Syn_Inst, Targ.Mem_Obj, Targ.Mem_Moff,
+                                      Targ.Mem_Voff, Targ.Targ_Type, Loc);
+      end case;
    end Synth_Read;
 
    --  Concurrent or sequential simple signal assignment
@@ -1505,9 +1509,6 @@ package body Synth.Stmts is
                Actual := Get_Actual (Assoc);
                Info := Synth_Target (Caller_Inst, Actual);
 
-               if Info.Kind /= Target_Simple then
-                  raise Internal_Error;
-               end if;
                case Iir_Kinds_Interface_Object_Declaration (Get_Kind (Inter))
                   is
                   when Iir_Kind_Interface_Constant_Declaration =>
@@ -1516,7 +1517,9 @@ package body Synth.Stmts is
                      --  Always pass by value.
                      Nbr_Inout := Nbr_Inout + 1;
                      Infos (Nbr_Inout) := Info;
-                     if Is_Static (Info.Obj) then
+                     if Info.Kind = Target_Simple
+                       and then Is_Static (Info.Obj)
+                     then
                         if Info.Off /= 0 then
                            raise Internal_Error;
                         end if;
@@ -1526,6 +1529,9 @@ package body Synth.Stmts is
                      end if;
                   when Iir_Kind_Interface_Signal_Declaration =>
                      --  Always pass by reference (use an alias).
+                     if Info.Kind /= Target_Simple then
+                        raise Internal_Error;
+                     end if;
                      Val := Create_Value_Alias
                        (Info.Obj, Info.Off, Info.Targ_Type);
                   when Iir_Kind_Interface_File_Declaration =>
-- 
cgit v1.2.3