From af908ae0045f13ebd067aa4c087ff7f638a14edc Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Tue, 31 May 2022 05:23:08 +0200 Subject: synth-vhdl_stmts: do not convert out variable on call --- src/synth/synth-vhdl_stmts.adb | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'src/synth/synth-vhdl_stmts.adb') diff --git a/src/synth/synth-vhdl_stmts.adb b/src/synth/synth-vhdl_stmts.adb index 493c412a0..f226e7b59 100644 --- a/src/synth/synth-vhdl_stmts.adb +++ b/src/synth/synth-vhdl_stmts.adb @@ -1849,9 +1849,14 @@ package body Synth.Vhdl_Stmts is case Iir_Kinds_Interface_Object_Declaration (Get_Kind (Inter)) is when Iir_Kind_Interface_Constant_Declaration | Iir_Kind_Interface_Variable_Declaration => - -- Always passed by value - Val := Synth_Subtype_Conversion - (Ctxt, Val, Inter_Type, True, Assoc); + if Get_Mode (Inter) /= Iir_Out_Mode then + -- Always passed by value + Val := Synth_Subtype_Conversion + (Ctxt, Val, Inter_Type, True, Assoc); + else + -- Use default value ? + null; + end if; when Iir_Kind_Interface_Signal_Declaration => -- LRM08 4.2.2.3 Signal parameters -- If an actual signal is associated with a signal parameter -- cgit v1.2.3