From 33eb34d7ca038b8ab0b2c116e4a5453bf1bde9f3 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Wed, 5 Jan 2022 19:25:14 +0100 Subject: synth: ignore use clauses in finalization Fix #1942 --- src/synth/synth-vhdl_decls.adb | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/synth/synth-vhdl_decls.adb') diff --git a/src/synth/synth-vhdl_decls.adb b/src/synth/synth-vhdl_decls.adb index 29b8b455a..ae320e6cc 100644 --- a/src/synth/synth-vhdl_decls.adb +++ b/src/synth/synth-vhdl_decls.adb @@ -741,6 +741,8 @@ package body Synth.Vhdl_Decls is when Iir_Kind_Package_Instantiation_Declaration => -- TODO: also finalize ? null; + when Iir_Kind_Use_Clause => + null; when others => Vhdl.Errors.Error_Kind ("finalize_declaration", Decl); end case; -- cgit v1.2.3