From 9ee5974eb73b553de30a64e635c328f92b2296a3 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Sat, 21 May 2022 21:21:22 +0200 Subject: synth: use unidimentional arrays in type_acc. Factorize code. --- src/synth/synth-disp_vhdl.adb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/synth/synth-disp_vhdl.adb') diff --git a/src/synth/synth-disp_vhdl.adb b/src/synth/synth-disp_vhdl.adb index 8a5f4f863..dfb4a78d6 100644 --- a/src/synth/synth-disp_vhdl.adb +++ b/src/synth/synth-disp_vhdl.adb @@ -196,7 +196,7 @@ package body Synth.Disp_Vhdl is else -- Any array. declare - Bnd : Bound_Type renames Typ.Abounds.D (1); + Bnd : Bound_Type renames Typ.Abound; El_Type : constant Node := Get_Element_Subtype (Ptype); El_W : constant Width := Get_Type_Width (Typ.Arr_El); Idx : Int32; @@ -375,7 +375,7 @@ package body Synth.Disp_Vhdl is Put_Line (");"); else declare - Bnd : Bound_Type renames Typ.Abounds.D (1); + Bnd : Bound_Type renames Typ.Abound; El_Type : constant Node := Get_Element_Subtype (Ptype); El_W : constant Width := Get_Type_Width (Typ.Arr_El); Idx : Int32; -- cgit v1.2.3