From 13fcbfe8a2ef3e027458b88d338909172e6f5133 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Wed, 25 Sep 2019 08:04:58 +0200 Subject: synth-disp_vhdl: handle in conversions from bitvector. Fix #940 --- src/synth/synth-disp_vhdl.adb | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/synth/synth-disp_vhdl.adb') diff --git a/src/synth/synth-disp_vhdl.adb b/src/synth/synth-disp_vhdl.adb index d801e0fc1..0ea78fc26 100644 --- a/src/synth/synth-disp_vhdl.adb +++ b/src/synth/synth-disp_vhdl.adb @@ -155,6 +155,11 @@ package body Synth.Disp_Vhdl is Put (" (" & Pfx & "'left)"); end if; Put_Line (");"); + elsif Btype = Vhdl.Std_Package.Bit_Vector_Type_Definition then + W := Typ.Vbound.Len; + Disp_In_Lhs (Mname, Off, W, Full); + Put ("to_stdlogicvector (" & Pfx & ")"); + Put_Line (";"); else Error_Kind ("disp_in_converter(arr)", Ptype); end if; -- cgit v1.2.3