From a87efba0ca0cc55cc26a28371eb1963a2e720498 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Thu, 17 Oct 2019 06:35:04 +0200
Subject: synth: add netlists-memories to extract memories.  Still WIP.

---
 src/synth/netlists-gates.ads | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/synth/netlists-gates.ads')

diff --git a/src/synth/netlists-gates.ads b/src/synth/netlists-gates.ads
index f37b41f67..e0cf9a6e1 100644
--- a/src/synth/netlists-gates.ads
+++ b/src/synth/netlists-gates.ads
@@ -169,6 +169,7 @@ package Netlists.Gates is
    Id_Memory : constant Module_Id := 73;
 
    --  Same as Id_Memory but with an initial value.
+   --  Input: INIT
    Id_Memory_Init : constant Module_Id := 74;
 
    --  Asynchronous memory read port.
-- 
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