From fbe600e08c0f08d7789ca8e504759af5f1edc00f Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Fri, 12 Nov 2021 18:50:33 +0100
Subject: std_names: add syn_black_box

---
 src/std_names.adb | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/std_names.adb')

diff --git a/src/std_names.adb b/src/std_names.adb
index 245c8a1a9..cf3ffeef5 100644
--- a/src/std_names.adb
+++ b/src/std_names.adb
@@ -687,6 +687,7 @@ package body Std_Names is
       Def ("gclk",               Name_Gclk);
       Def ("loc",                Name_Loc);
       Def ("keep",               Name_Keep);
+      Def ("syn_black_box",      Name_Syn_Black_Box);
 
       --  Verilog directives
       Def ("define",          Name_Define);
-- 
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