From b7a9e4b9b5ac2c195da6f3549dd06b5c6e999a0f Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Tue, 27 Dec 2022 08:53:00 +0100 Subject: synth: add statement in context, adjust path/instance name attributes --- src/simul/simul-vhdl_elab.adb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/simul') diff --git a/src/simul/simul-vhdl_elab.adb b/src/simul/simul-vhdl_elab.adb index 36bc1df23..3f4d0af4f 100644 --- a/src/simul/simul-vhdl_elab.adb +++ b/src/simul/simul-vhdl_elab.adb @@ -1077,7 +1077,7 @@ package body Simul.Vhdl_Elab is Proc := Processes_Table.Table (I).Proc; if Get_Kind (Proc) in Iir_Kinds_Process_Statement then Proc_Inst := Make_Elab_Instance (Processes_Table.Table (I).Inst, - Proc, Null_Node); + Proc, Proc, Null_Node); Processes_Table.Table (I).Inst := Proc_Inst; Set_Instance_Const (Proc_Inst, True); Synth.Vhdl_Decls.Synth_Declarations -- cgit v1.2.3