From 8fb4da723067b2ff99050f9ef9fc0bbd3c835ef4 Mon Sep 17 00:00:00 2001 From: Patrick Lehmann Date: Mon, 23 Aug 2021 00:13:43 +0200 Subject: Some fixes. --- pyGHDL/dom/Concurrent.py | 16 ++++++++-------- pyGHDL/dom/DesignUnit.py | 3 +-- pyGHDL/dom/Sequential.py | 11 +++++++---- pyGHDL/dom/_Translate.py | 9 ++++----- pyGHDL/dom/formatting/prettyprint.py | 3 +-- 5 files changed, 21 insertions(+), 21 deletions(-) (limited to 'pyGHDL/dom') diff --git a/pyGHDL/dom/Concurrent.py b/pyGHDL/dom/Concurrent.py index 2910e596c..a1949c86b 100644 --- a/pyGHDL/dom/Concurrent.py +++ b/pyGHDL/dom/Concurrent.py @@ -277,7 +277,6 @@ class ProcessStatement(VHDLModel_ProcessStatement, DOMMixin): def parse( cls, processNode: Iir, label: str, hasSensitivityList: bool ) -> "ProcessStatement": - from pyGHDL.dom._Utils import GetIirKindOfNode from pyGHDL.dom._Translate import ( GetDeclaredItemsFromChainedNodes, GetSequentialStatementsFromChainedNodes, @@ -285,6 +284,7 @@ class ProcessStatement(VHDLModel_ProcessStatement, DOMMixin): sensitivityList = None if hasSensitivityList: + # FIXME: sensitity list sensitivityListNode = nodes.Get_Sensitivity_List(processNode) # print("sensi", GetIirKindOfNode(sensitivityListNode)) @@ -323,7 +323,7 @@ class IfGenerateBranch(VHDLModel_IfGenerateBranch): body = nodes.Get_Generate_Statement_Body(generateNode) # TODO: alternative label - alternativeLabelId = nodes.Get_Alternative_Label(body) + # alternativeLabelId = nodes.Get_Alternative_Label(body) alternativeLabel = "" declarationChain = nodes.Get_Declaration_Chain(body) @@ -364,7 +364,7 @@ class ElsifGenerateBranch(VHDLModel_ElsifGenerateBranch): body = nodes.Get_Generate_Statement_Body(generateNode) # TODO: alternative label - alternativeLabelId = nodes.Get_Alternative_Label(body) + # alternativeLabelId = nodes.Get_Alternative_Label(body) alternativeLabel = "" declarationChain = nodes.Get_Declaration_Chain(body) @@ -402,7 +402,7 @@ class ElseGenerateBranch(VHDLModel_ElseGenerateBranch): body = nodes.Get_Generate_Statement_Body(generateNode) # TODO: alternative label - alternativeLabelId = nodes.Get_Alternative_Label(body) + # alternativeLabelId = nodes.Get_Alternative_Label(body) alternativeLabel = "" declarationChain = nodes.Get_Declaration_Chain(body) @@ -492,7 +492,7 @@ class GenerateCase(VHDLModel_GenerateCase, DOMMixin): body = nodes.Get_Associated_Block(caseNode) # TODO: alternative label - alternativeLabelId = nodes.Get_Alternative_Label(body) + # alternativeLabelId = nodes.Get_Alternative_Label(body) alternativeLabel = "" declarationChain = nodes.Get_Declaration_Chain(body) @@ -530,7 +530,7 @@ class OthersGenerateCase(VHDLModel_OthersGenerateCase, DOMMixin): body = nodes.Get_Associated_Block(caseNode) # TODO: alternative label - alternativeLabelId = nodes.Get_Alternative_Label(body) + # alternativeLabelId = nodes.Get_Alternative_Label(body) alternativeLabel = "" declarationChain = nodes.Get_Declaration_Chain(body) @@ -653,11 +653,11 @@ class ForGenerateStatement(VHDLModel_ForGenerateStatement, DOMMixin): generateNode: Iir, label: str, loopIndex: str, - range: Range, + rng: Range, declaredItems: Iterable = None, statements: Iterable[ConcurrentStatement] = None, ): - super().__init__(label, loopIndex, range, declaredItems, statements) + super().__init__(label, loopIndex, rng, declaredItems, statements) DOMMixin.__init__(self, generateNode) @classmethod diff --git a/pyGHDL/dom/DesignUnit.py b/pyGHDL/dom/DesignUnit.py index 5db6c1613..ff738e7dc 100644 --- a/pyGHDL/dom/DesignUnit.py +++ b/pyGHDL/dom/DesignUnit.py @@ -41,7 +41,6 @@ This module contains all DOM classes for VHDL's design units (:class:`context Generator[AssociationItem, None, None]: +) -> Generator[GenericAssociationItem, None, None]: return GetMapAspect(genericMapAspect, GenericAssociationItem, "generic") -def GetPortMapAspect(portMapAspect: Iir) -> Generator[AssociationItem, None, None]: +def GetPortMapAspect(portMapAspect: Iir) -> Generator[PortAssociationItem, None, None]: return GetMapAspect(portMapAspect, PortAssociationItem, "port") def GetParameterMapAspect( parameterMapAspect: Iir, -) -> Generator[AssociationItem, None, None]: +) -> Generator[ParameterAssociationItem, None, None]: return GetMapAspect(parameterMapAspect, ParameterAssociationItem, "parameter") diff --git a/pyGHDL/dom/formatting/prettyprint.py b/pyGHDL/dom/formatting/prettyprint.py index 6314d37f2..6c0f06061 100644 --- a/pyGHDL/dom/formatting/prettyprint.py +++ b/pyGHDL/dom/formatting/prettyprint.py @@ -43,7 +43,6 @@ from pyGHDL.dom.Concurrent import ( ComponentInstantiation, ConfigurationInstantiation, EntityInstantiation, - OthersGenerateCase, ConcurrentProcedureCall, ) from pyVHDLModel.SyntaxModel import ( @@ -93,7 +92,7 @@ from pyGHDL.dom.InterfaceItem import ( PortSignalInterfaceItem, GenericTypeInterfaceItem, ) -from pyGHDL.dom.Object import Constant, Signal, SharedVariable, File, DeferredConstant +from pyGHDL.dom.Object import Constant, Signal, SharedVariable, File from pyGHDL.dom.Attribute import Attribute, AttributeSpecification from pyGHDL.dom.Subprogram import Procedure from pyGHDL.dom.Misc import Alias -- cgit v1.2.3