From cb0c13d82e6d8f12029ace572b8ae4e788dcfa9a Mon Sep 17 00:00:00 2001 From: Patrick Lehmann Date: Fri, 18 Jun 2021 15:33:42 +0200 Subject: First step towards aggregates. --- pyGHDL/dom/Aggregates.py | 81 ++++++++++++++++++++++++++++++++++++ pyGHDL/dom/Expression.py | 55 +++++++++++++++++++++++- pyGHDL/dom/Symbol.py | 7 ++++ pyGHDL/dom/_Translate.py | 4 +- pyGHDL/dom/formatting/prettyprint.py | 4 +- 5 files changed, 147 insertions(+), 4 deletions(-) create mode 100644 pyGHDL/dom/Aggregates.py (limited to 'pyGHDL/dom') diff --git a/pyGHDL/dom/Aggregates.py b/pyGHDL/dom/Aggregates.py new file mode 100644 index 000000000..5a77b7e37 --- /dev/null +++ b/pyGHDL/dom/Aggregates.py @@ -0,0 +1,81 @@ +# ============================================================================= +# ____ _ _ ____ _ _ +# _ __ _ _ / ___| | | | _ \| | __| | ___ _ __ ___ +# | '_ \| | | | | _| |_| | | | | | / _` |/ _ \| '_ ` _ \ +# | |_) | |_| | |_| | _ | |_| | |___ | (_| | (_) | | | | | | +# | .__/ \__, |\____|_| |_|____/|_____(_)__,_|\___/|_| |_| |_| +# |_| |___/ +# ============================================================================= +# Authors: +# Patrick Lehmann +# +# Package module: DOM: VHDL design units (e.g. context or package). +# +# License: +# ============================================================================ +# Copyright (C) 2019-2021 Tristan Gingold +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# SPDX-License-Identifier: GPL-2.0-or-later +# ============================================================================ + +""" +This module contains all DOM classes for VHDL's design units (:class:`context `, +:class:`architecture `, :class:`package `, +:class:`package body `, :class:`context ` and +:class:`configuration `. + + +""" +from pydecor import export + +from pyVHDLModel.VHDLModel import ( + SimpleAggregateElement as VHDLModel_SimpleAggregateElement, + IndexedAggregateElement as VHDLModel_IndexedAggregateElement, + RangedAggregateElement as VHDLModel_RangedAggregateElement, + NamedAggregateElement as VHDLModel_NamedAggregateElement, + OthersAggregateElement as VHDLModel_OthersAggregateElement, Expression +) + + +__all__ = [] + + + +@export +class SimpleAggregateElement(VHDLModel_SimpleAggregateElement): + def __init__(self, expression: Expression): + super().__init__() + self._expression = expression + + +@export +class IndexedAggregateElement(VHDLModel_IndexedAggregateElement): + pass + + +@export +class RangedAggregateElement(VHDLModel_RangedAggregateElement): + pass + + +@export +class NamedAggregateElement(VHDLModel_NamedAggregateElement): + pass + + +@export +class OthersAggregateElement(VHDLModel_OthersAggregateElement): + pass diff --git a/pyGHDL/dom/Expression.py b/pyGHDL/dom/Expression.py index 80ef2823c..bfe2cd9dd 100644 --- a/pyGHDL/dom/Expression.py +++ b/pyGHDL/dom/Expression.py @@ -30,6 +30,14 @@ # # SPDX-License-Identifier: GPL-2.0-or-later # ============================================================================ +from typing import List + +from pyGHDL.dom.Aggregates import OthersAggregateElement, SimpleAggregateElement, RangedAggregateElement, IndexedAggregateElement, NamedAggregateElement +from pyGHDL.dom.Symbol import EnumerationLiteralSymbol +from pyGHDL.libghdl import utils + +from pyGHDL.dom.Common import DOMException +from pyGHDL.dom._Utils import GetIirKindOfNode from pyGHDL.libghdl.vhdl import nodes from pydecor import export @@ -66,7 +74,8 @@ from pyVHDLModel.VHDLModel import ( ShiftLeftArithmeticExpression as VHDLModel_ShiftLeftArithmeticExpression, RotateRightExpression as VHDLModel_RotateRightExpression, RotateLeftExpression as VHDLModel_RotateLeftExpression, - Expression, + Aggregate as VHDLModel_Aggregate, + Expression, AggregateElement, ) __all__ = [] @@ -350,3 +359,47 @@ class RotateLeftExpression(VHDLModel_RotateLeftExpression, _ParseBinaryExpressio super().__init__() self._leftOperand = left self._rightOperand = right + + +@export +class Aggregate(VHDLModel_Aggregate): + def __init__(self, elements: List[AggregateElement]): + super().__init__() + self._elements = elements + + @classmethod + def parse(cls, node): + from pyGHDL.dom._Translate import GetExpressionFromNode + + choices = [] + + choicesChain = nodes.Get_Association_Choices_Chain(node) + for item in utils.chain_iter(choicesChain): + kind = GetIirKindOfNode(item) + if kind == nodes.Iir_Kind.Choice_By_None: + value = GetExpressionFromNode(nodes.Get_Associated_Expr(item)) + choices.append(SimpleAggregateElement(value)) + elif kind == nodes.Iir_Kind.Choice_By_Expression: + index = GetExpressionFromNode(nodes.Get_Choice_Expression(item)) + value = GetExpressionFromNode(nodes.Get_Associated_Expr(item)) + choices.append(IndexedAggregateElement(index, value)) + elif kind == nodes.Iir_Kind.Choice_By_Range: + r = GetExpressionFromNode(nodes.Get_Choice_Range(item)) + value = GetExpressionFromNode(nodes.Get_Associated_Expr(item)) + choices.append(RangedAggregateElement(r, value)) + elif kind == nodes.Iir_Kind.Choice_By_Name: + name = EnumerationLiteralSymbol(nodes.Get_Choice_Name(item)) + value = GetExpressionFromNode(nodes.Get_Associated_Expr(item)) + choices.append(NamedAggregateElement(name, value)) + elif kind == nodes.Iir_Kind.Choice_By_Others: + expression = None + choices.append(OthersAggregateElement(expression)) + else: + raise DOMException( + "Unknown choice kind '{kindName}'({kind}) in aggregate '{aggr}'.".format( + kind=kind, kindName=kind.name, aggr=node + ) + ) + + return choices + diff --git a/pyGHDL/dom/Symbol.py b/pyGHDL/dom/Symbol.py index c7b681595..e722d2c0a 100644 --- a/pyGHDL/dom/Symbol.py +++ b/pyGHDL/dom/Symbol.py @@ -38,6 +38,7 @@ from pyGHDL.dom._Utils import NodeToName from pyVHDLModel.VHDLModel import ( SimpleSubTypeSymbol as VHDLModel_SimpleSubTypeSymbol, ConstrainedSubTypeSymbol as VHDLModel_ConstrainedSubTypeSymbol, + EnumerationLiteralSymbol as VHDLModel_EnumerationLiteralSymbol, SimpleObjectSymbol as VHDLModel_SimpleObjectSymbol, Constraint, ) @@ -45,6 +46,12 @@ from pyVHDLModel.VHDLModel import ( __all__ = [] +@export +class EnumerationLiteralSymbol(VHDLModel_EnumerationLiteralSymbol): + def __init__(self, literalName: str): + super().__init__(symbolName=literalName) + + @export class SimpleSubTypeSymbol(VHDLModel_SimpleSubTypeSymbol): def __init__(self, subTypeName: str): diff --git a/pyGHDL/dom/_Translate.py b/pyGHDL/dom/_Translate.py index 9eb4937ec..f0ffe1cf1 100644 --- a/pyGHDL/dom/_Translate.py +++ b/pyGHDL/dom/_Translate.py @@ -53,7 +53,7 @@ from pyGHDL.dom.Expression import ( MultiplyExpression, DivisionExpression, InverseExpression, - ExponentiationExpression, + ExponentiationExpression, Aggregate, ) __all__ = [] @@ -135,7 +135,7 @@ __EXPRESSION_TRANSLATION = { nodes.Iir_Kind.Multiplication_Operator: MultiplyExpression, nodes.Iir_Kind.Division_Operator: DivisionExpression, nodes.Iir_Kind.Exponentiation_Operator: ExponentiationExpression, - # nodes.Iir_Kind.Aggregate: Aggregate + nodes.Iir_Kind.Aggregate: Aggregate, } diff --git a/pyGHDL/dom/formatting/prettyprint.py b/pyGHDL/dom/formatting/prettyprint.py index 59fdd485b..1f71c87d5 100644 --- a/pyGHDL/dom/formatting/prettyprint.py +++ b/pyGHDL/dom/formatting/prettyprint.py @@ -45,7 +45,7 @@ from pyGHDL.dom.Expression import ( InverseExpression, AbsoluteExpression, NegationExpression, - ExponentiationExpression, + ExponentiationExpression, Aggregate, ) StringBuffer = List[str] @@ -375,5 +375,7 @@ class PrettyPrint: right=self.formatExpression(expression.RightOperand), operator=operator, ) + elif isinstance(expression, Aggregate): + print(Aggregate.Elements[0]) else: raise PrettyPrintException("Unhandled expression kind.") -- cgit v1.2.3 From 4e227b02c6ff0c12ce586295a88176a9af2c3889 Mon Sep 17 00:00:00 2001 From: Patrick Lehmann Date: Fri, 18 Jun 2021 18:16:06 +0200 Subject: Format aggregates. --- pyGHDL/dom/Expression.py | 2 +- pyGHDL/dom/formatting/prettyprint.py | 29 ++++++++++++++++++++++++++++- 2 files changed, 29 insertions(+), 2 deletions(-) (limited to 'pyGHDL/dom') diff --git a/pyGHDL/dom/Expression.py b/pyGHDL/dom/Expression.py index bfe2cd9dd..505006d5b 100644 --- a/pyGHDL/dom/Expression.py +++ b/pyGHDL/dom/Expression.py @@ -401,5 +401,5 @@ class Aggregate(VHDLModel_Aggregate): ) ) - return choices + return cls(choices) diff --git a/pyGHDL/dom/formatting/prettyprint.py b/pyGHDL/dom/formatting/prettyprint.py index 1f71c87d5..1167d41f4 100644 --- a/pyGHDL/dom/formatting/prettyprint.py +++ b/pyGHDL/dom/formatting/prettyprint.py @@ -2,6 +2,7 @@ from typing import List, Union from pydecor import export +from pyGHDL.dom.Aggregates import SimpleAggregateElement, IndexedAggregateElement, RangedAggregateElement, NamedAggregateElement, OthersAggregateElement from pyGHDL.dom.Object import Constant, Signal from pyVHDLModel.VHDLModel import ( GenericInterfaceItem, @@ -14,6 +15,7 @@ from pyVHDLModel.VHDLModel import ( IdentityExpression, UnaryExpression, WithDefaultExpression, + AggregateElement ) from pyGHDL import GHDLBaseException @@ -376,6 +378,31 @@ class PrettyPrint: operator=operator, ) elif isinstance(expression, Aggregate): - print(Aggregate.Elements[0]) + return "({choices})".format(choices=", ".join([self.formatAggregateElement(element) for element in expression.Elements])) else: raise PrettyPrintException("Unhandled expression kind.") + + def formatAggregateElement(self, aggregateElement: AggregateElement): + if isinstance(aggregateElement, SimpleAggregateElement): + return "{value}".format( + value=self.formatExpression(aggregateElement.Expression) + ) + elif isinstance(aggregateElement, IndexedAggregateElement): + return "{index} => {value}".format( + index=self.formatExpression(aggregateElement.Index), + value=self.formatExpression(aggregateElement.Expression) + ) + elif isinstance(aggregateElement, RangedAggregateElement): + return "{range} => {value}".format( + range=self.formatRange(aggregateElement.Range), + value=self.formatExpression(aggregateElement.Expression) + ) + elif isinstance(aggregateElement, NamedAggregateElement): + return "{name} => {value}".format( + name=aggregateElement.Name, + value=self.formatExpression(aggregateElement.Expression) + ) + elif isinstance(aggregateElement, OthersAggregateElement): + return "other => {value}".format( + value=self.formatExpression(aggregateElement.Expression) + ) -- cgit v1.2.3 From bc693d0a5a725a2806656117d65b926150e71cb4 Mon Sep 17 00:00:00 2001 From: Patrick Lehmann Date: Fri, 18 Jun 2021 18:26:19 +0200 Subject: Better aggregate handling --- pyGHDL/dom/Aggregates.py | 21 +++++++++++++++++---- pyGHDL/dom/formatting/prettyprint.py | 17 +++++++++-------- 2 files changed, 26 insertions(+), 12 deletions(-) (limited to 'pyGHDL/dom') diff --git a/pyGHDL/dom/Aggregates.py b/pyGHDL/dom/Aggregates.py index 5a77b7e37..89acfa312 100644 --- a/pyGHDL/dom/Aggregates.py +++ b/pyGHDL/dom/Aggregates.py @@ -41,6 +41,8 @@ This module contains all DOM classes for VHDL's design units (:class:`context str: + return "{left} {dir} {right}".format( + left=self.formatExpression(r.LeftBound), + right=self.formatExpression(r.RightBound), + dir=DirectionTranslation[r.Direction], + ) + def formatExpression(self, expression: Expression) -> str: if isinstance(expression, SimpleObjectSymbol): return "{name}".format(name=expression.SymbolName) -- cgit v1.2.3 From a81f2f777e30dadc775380a362c7fe38280a5234 Mon Sep 17 00:00:00 2001 From: umarcor Date: Fri, 18 Jun 2021 19:25:53 +0200 Subject: pyGHDL: run black --- pyGHDL/dom/Aggregates.py | 4 ++-- pyGHDL/dom/Expression.py | 12 +++++++++--- pyGHDL/dom/_Translate.py | 3 ++- pyGHDL/dom/formatting/prettyprint.py | 33 +++++++++++++++++++++++++-------- 4 files changed, 38 insertions(+), 14 deletions(-) (limited to 'pyGHDL/dom') diff --git a/pyGHDL/dom/Aggregates.py b/pyGHDL/dom/Aggregates.py index 89acfa312..ac8ecbca8 100644 --- a/pyGHDL/dom/Aggregates.py +++ b/pyGHDL/dom/Aggregates.py @@ -48,14 +48,14 @@ from pyVHDLModel.VHDLModel import ( IndexedAggregateElement as VHDLModel_IndexedAggregateElement, RangedAggregateElement as VHDLModel_RangedAggregateElement, NamedAggregateElement as VHDLModel_NamedAggregateElement, - OthersAggregateElement as VHDLModel_OthersAggregateElement, Expression + OthersAggregateElement as VHDLModel_OthersAggregateElement, + Expression, ) __all__ = [] - @export class SimpleAggregateElement(VHDLModel_SimpleAggregateElement): def __init__(self, expression: Expression): diff --git a/pyGHDL/dom/Expression.py b/pyGHDL/dom/Expression.py index 505006d5b..a6b88ac23 100644 --- a/pyGHDL/dom/Expression.py +++ b/pyGHDL/dom/Expression.py @@ -32,7 +32,13 @@ # ============================================================================ from typing import List -from pyGHDL.dom.Aggregates import OthersAggregateElement, SimpleAggregateElement, RangedAggregateElement, IndexedAggregateElement, NamedAggregateElement +from pyGHDL.dom.Aggregates import ( + OthersAggregateElement, + SimpleAggregateElement, + RangedAggregateElement, + IndexedAggregateElement, + NamedAggregateElement, +) from pyGHDL.dom.Symbol import EnumerationLiteralSymbol from pyGHDL.libghdl import utils @@ -75,7 +81,8 @@ from pyVHDLModel.VHDLModel import ( RotateRightExpression as VHDLModel_RotateRightExpression, RotateLeftExpression as VHDLModel_RotateLeftExpression, Aggregate as VHDLModel_Aggregate, - Expression, AggregateElement, + Expression, + AggregateElement, ) __all__ = [] @@ -402,4 +409,3 @@ class Aggregate(VHDLModel_Aggregate): ) return cls(choices) - diff --git a/pyGHDL/dom/_Translate.py b/pyGHDL/dom/_Translate.py index f0ffe1cf1..2cdf686d4 100644 --- a/pyGHDL/dom/_Translate.py +++ b/pyGHDL/dom/_Translate.py @@ -53,7 +53,8 @@ from pyGHDL.dom.Expression import ( MultiplyExpression, DivisionExpression, InverseExpression, - ExponentiationExpression, Aggregate, + ExponentiationExpression, + Aggregate, ) __all__ = [] diff --git a/pyGHDL/dom/formatting/prettyprint.py b/pyGHDL/dom/formatting/prettyprint.py index a2ad6e949..7b5807cc2 100644 --- a/pyGHDL/dom/formatting/prettyprint.py +++ b/pyGHDL/dom/formatting/prettyprint.py @@ -2,7 +2,13 @@ from typing import List, Union from pydecor import export -from pyGHDL.dom.Aggregates import SimpleAggregateElement, IndexedAggregateElement, RangedAggregateElement, NamedAggregateElement, OthersAggregateElement +from pyGHDL.dom.Aggregates import ( + SimpleAggregateElement, + IndexedAggregateElement, + RangedAggregateElement, + NamedAggregateElement, + OthersAggregateElement, +) from pyGHDL.dom.Object import Constant, Signal from pyGHDL.dom.Range import Range from pyVHDLModel.VHDLModel import ( @@ -16,7 +22,7 @@ from pyVHDLModel.VHDLModel import ( IdentityExpression, UnaryExpression, WithDefaultExpression, - AggregateElement + AggregateElement, ) from pyGHDL import GHDLBaseException @@ -48,7 +54,8 @@ from pyGHDL.dom.Expression import ( InverseExpression, AbsoluteExpression, NegationExpression, - ExponentiationExpression, Aggregate, + ExponentiationExpression, + Aggregate, ) StringBuffer = List[str] @@ -323,7 +330,10 @@ class PrettyPrint: return "{type}".format(type=subTypeIndication.SymbolName) elif isinstance(subTypeIndication, ConstrainedSubTypeSymbol): constraints = ", ".join( - [self.formatRange(constraint.Range) for constraint in subTypeIndication.Constraints] + [ + self.formatRange(constraint.Range) + for constraint in subTypeIndication.Constraints + ] ) return "{type}({constraints})".format( @@ -379,7 +389,14 @@ class PrettyPrint: operator=operator, ) elif isinstance(expression, Aggregate): - return "({choices})".format(choices=", ".join([self.formatAggregateElement(element) for element in expression.Elements])) + return "({choices})".format( + choices=", ".join( + [ + self.formatAggregateElement(element) + for element in expression.Elements + ] + ) + ) else: raise PrettyPrintException("Unhandled expression kind.") @@ -391,17 +408,17 @@ class PrettyPrint: elif isinstance(aggregateElement, IndexedAggregateElement): return "{index} => {value}".format( index=self.formatExpression(aggregateElement.Index), - value=self.formatExpression(aggregateElement.Expression) + value=self.formatExpression(aggregateElement.Expression), ) elif isinstance(aggregateElement, RangedAggregateElement): return "{range} => {value}".format( range=self.formatRange(aggregateElement.Range), - value=self.formatExpression(aggregateElement.Expression) + value=self.formatExpression(aggregateElement.Expression), ) elif isinstance(aggregateElement, NamedAggregateElement): return "{name} => {value}".format( name=aggregateElement.Name, - value=self.formatExpression(aggregateElement.Expression) + value=self.formatExpression(aggregateElement.Expression), ) elif isinstance(aggregateElement, OthersAggregateElement): return "other => {value}".format( -- cgit v1.2.3 From 5764b4a86c3389ed0388c9382a112640a04dc0b0 Mon Sep 17 00:00:00 2001 From: umarcor Date: Sat, 19 Jun 2021 00:18:04 +0200 Subject: pyGHDL: handle c_double --- pyGHDL/dom/Literal.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'pyGHDL/dom') diff --git a/pyGHDL/dom/Literal.py b/pyGHDL/dom/Literal.py index 8b32d7163..7c722583b 100644 --- a/pyGHDL/dom/Literal.py +++ b/pyGHDL/dom/Literal.py @@ -57,7 +57,7 @@ class FloatingPointLiteral(VHDLModel_FloatingPointLiteral): @classmethod def parse(cls, node): value = nodes.Get_Fp_Value(node) - return cls(float(value)) + return cls(value) @export -- cgit v1.2.3 From d9a096facfde93a78f1ce7546bb4f34f4e3cbde1 Mon Sep 17 00:00:00 2001 From: Patrick Lehmann Date: Sat, 19 Jun 2021 02:22:36 +0200 Subject: Improvements to pyGHDL.dom. --- pyGHDL/dom/DesignUnit.py | 10 ++- pyGHDL/dom/Symbol.py | 7 ++ pyGHDL/dom/_Translate.py | 4 +- pyGHDL/dom/formatting/prettyprint.py | 159 ++++++++++++++++++++--------------- 4 files changed, 109 insertions(+), 71 deletions(-) (limited to 'pyGHDL/dom') diff --git a/pyGHDL/dom/DesignUnit.py b/pyGHDL/dom/DesignUnit.py index 3619c47c5..534149677 100644 --- a/pyGHDL/dom/DesignUnit.py +++ b/pyGHDL/dom/DesignUnit.py @@ -41,7 +41,8 @@ This module contains all DOM classes for VHDL's design units (:class:`context StringBuffer: + buffer = [] + prefix = " " * level + buffer.append("{prefix}Libraries:".format(prefix=prefix)) + for library in design.Libraries: + for line in self.formatLibrary(library, level + 1): + buffer.append(line) + buffer.append("{prefix}Documents:".format(prefix=prefix)) + for document in design.Documents: + buffer.append( + "{prefix}- Path: '{doc!s}':".format(doc=document.Path, prefix=prefix) + ) + for line in self.formatDocument(document, level + 1): + buffer.append(line) + + return buffer + + def formatLibrary(self, library: Library, level: int = 0) -> StringBuffer: + buffer = [] + prefix = " " * level + buffer.append("{prefix}Entities:".format(prefix=prefix)) + for entity in library.Entities: + for line in self.formatEntity(entity, level + 1): + buffer.append(line) + buffer.append("{prefix}Architectures:".format(prefix=prefix)) + for architecture in library.Architectures: + for line in self.formatArchitecture(architecture, level + 1): + buffer.append(line) + buffer.append("{prefix}Packages:".format(prefix=prefix)) + for package in library.Packages: + for line in self.formatPackage(package, level + 1): + buffer.append(line) + buffer.append("{prefix}PackageBodies:".format(prefix=prefix)) + for packageBodies in library.PackageBodies: + for line in self.formatPackageBody(packageBodies, level + 1): + buffer.append(line) + buffer.append("{prefix}Configurations:".format(prefix=prefix)) + for configuration in library.Configurations: + for line in self.formatConfiguration(configuration, level + 1): + buffer.append(line) + buffer.append("{prefix}Contexts:".format(prefix=prefix)) + for context in library.Contexts: + for line in self.formatContext(context, level + 1): + buffer.append(line) + + return buffer + def formatDocument(self, document: Document, level: int = 0) -> StringBuffer: buffer = [] prefix = " " * level - buffer.append( - "{prefix}Document '{doc!s}':".format(doc=document.Path, prefix=prefix) - ) - buffer.append("{prefix} Entities:".format(prefix=prefix)) + buffer.append("{prefix}Entities:".format(prefix=prefix)) for entity in document.Entities: for line in self.formatEntity(entity, level + 1): buffer.append(line) - buffer.append("{prefix} Architectures:".format(prefix=prefix)) + buffer.append("{prefix}Architectures:".format(prefix=prefix)) for architecture in document.Architectures: for line in self.formatArchitecture(architecture, level + 1): buffer.append(line) - buffer.append("{prefix} Packages:".format(prefix=prefix)) + buffer.append("{prefix}Packages:".format(prefix=prefix)) for package in document.Packages: for line in self.formatPackage(package, level + 1): buffer.append(line) - buffer.append("{prefix} PackageBodies:".format(prefix=prefix)) + buffer.append("{prefix}PackageBodies:".format(prefix=prefix)) for packageBodies in document.PackageBodies: for line in self.formatPackageBody(packageBodies, level + 1): buffer.append(line) - buffer.append("{prefix} Configurations:".format(prefix=prefix)) + buffer.append("{prefix}Configurations:".format(prefix=prefix)) for configuration in document.Configurations: for line in self.formatConfiguration(configuration, level + 1): buffer.append(line) - buffer.append("{prefix} Contexts:".format(prefix=prefix)) + buffer.append("{prefix}Contexts:".format(prefix=prefix)) for context in document.Contexts: for line in self.formatContext(context, level + 1): buffer.append(line) @@ -134,7 +177,7 @@ class PrettyPrint: def formatEntity(self, entity: Entity, level: int = 0) -> StringBuffer: buffer = [] prefix = " " * level - buffer.append("{prefix}- {name}".format(name=entity.Name, prefix=prefix)) + buffer.append("{prefix}- Name: {name}".format(name=entity.Name, prefix=prefix)) buffer.append("{prefix} Generics:".format(prefix=prefix)) for generic in entity.GenericItems: for line in self.formatGeneric(generic, level + 1): @@ -155,7 +198,14 @@ class PrettyPrint: ) -> StringBuffer: buffer = [] prefix = " " * level - buffer.append("{prefix}- {name}".format(name=architecture.Name, prefix=prefix)) + buffer.append( + "{prefix}- Name: {name}".format(name=architecture.Name, prefix=prefix) + ) + buffer.append( + "{prefix} Entity: {entity}".format( + entity=architecture.Entity.SymbolName, prefix=prefix + ) + ) buffer.append("{prefix} Declared:".format(prefix=prefix)) for item in architecture.DeclaredItems: for line in self.formatDeclaredItems(item, level + 2): @@ -166,7 +216,7 @@ class PrettyPrint: def formatPackage(self, package: Package, level: int = 0) -> StringBuffer: buffer = [] prefix = " " * level - buffer.append("{prefix}- {name}".format(name=package.Name, prefix=prefix)) + buffer.append("{prefix}- Name: {name}".format(name=package.Name, prefix=prefix)) buffer.append("{prefix} Declared:".format(prefix=prefix)) for item in package.DeclaredItems: for line in self.formatDeclaredItems(item, level + 1): @@ -179,7 +229,9 @@ class PrettyPrint: ) -> StringBuffer: buffer = [] prefix = " " * level - buffer.append("{prefix}- {name}".format(name=packageBody.Name, prefix=prefix)) + buffer.append( + "{prefix}- Name: {name}".format(name=packageBody.Name, prefix=prefix) + ) buffer.append("{prefix} Declared:".format(prefix=prefix)) for item in packageBody.DeclaredItems: for line in self.formatDeclaredItems(item, level + 1): @@ -192,14 +244,16 @@ class PrettyPrint: ) -> StringBuffer: buffer = [] prefix = " " * level - buffer.append("{prefix}- {name}".format(name=configuration.Name, prefix=prefix)) + buffer.append( + "{prefix}- Name: {name}".format(name=configuration.Name, prefix=prefix) + ) return buffer def formatContext(self, context: Context, level: int = 0) -> StringBuffer: buffer = [] prefix = " " * level - buffer.append("{prefix}- {name}".format(name=context.Name, prefix=prefix)) + buffer.append("{prefix}- Name: {name}".format(name=context.Name, prefix=prefix)) return buffer @@ -228,45 +282,18 @@ class PrettyPrint: ) -> StringBuffer: buffer = [] prefix = " " * level - subType = generic.SubType - if isinstance(subType, SimpleSubTypeSymbol): - buffer.append( - "{prefix} - {name} : {mode} {type}{initialValue}".format( - prefix=prefix, - name=generic.Name, - mode=ModeTranslation[generic.Mode], - type=subType.SymbolName, - initialValue=self.formatInitialValue(generic), - ) - ) - elif isinstance(subType, ConstrainedSubTypeSymbol): - buffer.append( - "{prefix} - {name} : {mode} {type}({constraints}){initialValue}".format( - prefix=prefix, - name=generic.Name, - mode=ModeTranslation[generic.Mode], - type=subType.SymbolName, - constraints=", ".join( - [ - "{left} {dir} {right}".format( - left=self.formatExpression(constraint.Range.LeftBound), - right=self.formatExpression( - constraint.Range.RightBound - ), - dir=DirectionTranslation[constraint.Range.Direction], - ) - for constraint in subType.Constraints - ] - ), - initialValue=self.formatInitialValue(generic), - ) - ) - else: - raise PrettyPrintException( - "Unhandled constraint kind for generic '{name}'.".format( - name=generic.Name - ) + + buffer.append( + "{prefix} - {name} : {mode} {subtypeindication}{initialValue}".format( + prefix=prefix, + name=generic.Name, + mode=ModeTranslation[generic.Mode], + subtypeindication=self.formatSubtypeIndication( + generic.SubType, "generic", generic.Name + ), + initialValue=self.formatInitialValue(generic), ) + ) return buffer @@ -352,7 +379,7 @@ class PrettyPrint: return " := {expr}".format(expr=self.formatExpression(item.DefaultExpression)) - def formatRange(self, r: Range) -> str: + def formatRange(self, r: Range): return "{left} {dir} {right}".format( left=self.formatExpression(r.LeftBound), right=self.formatExpression(r.RightBound), -- cgit v1.2.3 From ef0dbc726749df434036b23480b89f01cbe67d44 Mon Sep 17 00:00:00 2001 From: Patrick Lehmann Date: Sat, 19 Jun 2021 03:20:59 +0200 Subject: Added handling of Parenthesis. --- pyGHDL/dom/Expression.py | 15 +++++++++++++++ pyGHDL/dom/Misc.py | 4 +++- pyGHDL/dom/_Translate.py | 2 ++ pyGHDL/dom/formatting/prettyprint.py | 36 +++++++++++++++++++++--------------- 4 files changed, 41 insertions(+), 16 deletions(-) (limited to 'pyGHDL/dom') diff --git a/pyGHDL/dom/Expression.py b/pyGHDL/dom/Expression.py index a6b88ac23..fec347b57 100644 --- a/pyGHDL/dom/Expression.py +++ b/pyGHDL/dom/Expression.py @@ -52,6 +52,7 @@ from pyVHDLModel.VHDLModel import ( IdentityExpression as VHDLModel_IdentityExpression, NegationExpression as VHDLModel_NegationExpression, AbsoluteExpression as VHDLModel_AbsoluteExpression, + ParenthesisExpression as VHDLModel_ParenthesisExpression, TypeConversion as VHDLModel_TypeConversion, FunctionCall as VHDLModel_FunctionCall, QualifiedExpression as VHDLModel_QualifiedExpression, @@ -135,6 +136,20 @@ class AbsoluteExpression(VHDLModel_AbsoluteExpression, _ParseUnaryExpression): self._operand = operand +@export +class ParenthesisExpression(VHDLModel_ParenthesisExpression, _ParseUnaryExpression): + def __init__(self, operand: Expression): + super().__init__() + self._operand = operand + + @classmethod + def parse(cls, node): + from pyGHDL.dom._Translate import GetExpressionFromNode + + operand = GetExpressionFromNode(nodes.Get_Expression(node)) + return cls(operand) + + @export class TypeConversion(VHDLModel_TypeConversion): def __init__(self, operand: Expression): diff --git a/pyGHDL/dom/Misc.py b/pyGHDL/dom/Misc.py index 6ef66fcf0..7bee2ec7b 100644 --- a/pyGHDL/dom/Misc.py +++ b/pyGHDL/dom/Misc.py @@ -52,7 +52,7 @@ from pyGHDL.libghdl import ( LibGHDLException, utils, ) -from pyGHDL.libghdl.vhdl import nodes, sem_lib +from pyGHDL.libghdl.vhdl import nodes, sem_lib, parse from pyGHDL.dom._Utils import GetIirKindOfNode from pyGHDL.dom.Common import DOMException, GHDLMixin @@ -86,6 +86,8 @@ class Design(VHDLModel_Design): libghdl.set_option("--std=08") + parse.Flag_Parse_Parenthesis.value = True + # Finish initialization. This will load the standard package. if libghdl.analyze_init_status() != 0: raise LibGHDLException("Error initializing 'libghdl'.") diff --git a/pyGHDL/dom/_Translate.py b/pyGHDL/dom/_Translate.py index 8a4a717e9..24f056f33 100644 --- a/pyGHDL/dom/_Translate.py +++ b/pyGHDL/dom/_Translate.py @@ -56,6 +56,7 @@ from pyGHDL.dom.Expression import ( ExponentiationExpression, Aggregate, NegationExpression, + ParenthesisExpression, ) __all__ = [] @@ -134,6 +135,7 @@ __EXPRESSION_TRANSLATION = { nodes.Iir_Kind.Negation_Operator: NegationExpression, nodes.Iir_Kind.Addition_Operator: AdditionExpression, nodes.Iir_Kind.Not_Operator: InverseExpression, + nodes.Iir_Kind.Parenthesis_Expression: ParenthesisExpression, nodes.Iir_Kind.Substraction_Operator: SubtractionExpression, nodes.Iir_Kind.Multiplication_Operator: MultiplyExpression, nodes.Iir_Kind.Division_Operator: DivisionExpression, diff --git a/pyGHDL/dom/formatting/prettyprint.py b/pyGHDL/dom/formatting/prettyprint.py index 8ee49275c..c10b7cf87 100644 --- a/pyGHDL/dom/formatting/prettyprint.py +++ b/pyGHDL/dom/formatting/prettyprint.py @@ -48,6 +48,7 @@ from pyGHDL.dom.Expression import ( NegationExpression, ExponentiationExpression, Aggregate, + ParenthesisExpression, ) from pyGHDL.dom.Aggregates import ( SimpleAggregateElement, @@ -70,18 +71,19 @@ ModeTranslation = { } UnaryExpressionTranslation = { - IdentityExpression: " +", - NegationExpression: " -", - InverseExpression: "not ", - AbsoluteExpression: "abs ", + IdentityExpression: (" +", ""), + NegationExpression: (" -", ""), + InverseExpression: ("not ", ""), + AbsoluteExpression: ("abs ", ""), + ParenthesisExpression: ("(", ")"), } BinaryExpressionTranslation = { - AdditionExpression: " + ", - SubtractionExpression: " - ", - MultiplyExpression: " * ", - DivisionExpression: " / ", - ExponentiationExpression: "**", + AdditionExpression: ("", " + ", ""), + SubtractionExpression: ("", " - ", ""), + MultiplyExpression: ("", " * ", ""), + DivisionExpression: ("", " / ", ""), + ExponentiationExpression: ("", "**", ""), } @@ -401,8 +403,10 @@ class PrettyPrint: except KeyError: raise PrettyPrintException("Unhandled operator for unary expression.") - return "{operator}{operand}".format( - operand=self.formatExpression(expression.Operand), operator=operator + return "{leftOp}{operand}{rightOp}".format( + leftOp=operator[0], + rightOp=operator[1], + operand=self.formatExpression(expression.Operand), ) elif isinstance(expression, BinaryExpression): try: @@ -410,10 +414,12 @@ class PrettyPrint: except KeyError: raise PrettyPrintException("Unhandled operator for binary expression.") - return "{left}{operator}{right}".format( - left=self.formatExpression(expression.LeftOperand), - right=self.formatExpression(expression.RightOperand), - operator=operator, + return "{leftOp}{leftExpr}{middleOp}{rightExpr}{rightOp}".format( + leftOp=operator[0], + middleOp=operator[1], + rightOp=operator[2], + leftExpr=self.formatExpression(expression.LeftOperand), + rightExpr=self.formatExpression(expression.RightOperand), ) elif isinstance(expression, Aggregate): return "({choices})".format( -- cgit v1.2.3 From f683303868a941b02535aab4a989b2f916624a26 Mon Sep 17 00:00:00 2001 From: Patrick Lehmann Date: Sat, 19 Jun 2021 12:14:18 +0200 Subject: Simplified prettyprint, as pyVHDLModel has now builtin __str__ methods for expressions, aggregates and literals. --- pyGHDL/dom/Symbol.py | 3 - pyGHDL/dom/formatting/prettyprint.py | 128 ++--------------------------------- 2 files changed, 7 insertions(+), 124 deletions(-) (limited to 'pyGHDL/dom') diff --git a/pyGHDL/dom/Symbol.py b/pyGHDL/dom/Symbol.py index ffe45f89b..020f9fbc7 100644 --- a/pyGHDL/dom/Symbol.py +++ b/pyGHDL/dom/Symbol.py @@ -81,9 +81,6 @@ class ConstrainedSubTypeSymbol(VHDLModel_ConstrainedSubTypeSymbol): @export class SimpleObjectSymbol(VHDLModel_SimpleObjectSymbol): - def __init__(self, symbolName: str): - super().__init__(symbolName) - @classmethod def parse(cls, node): name = NodeToName(node) diff --git a/pyGHDL/dom/formatting/prettyprint.py b/pyGHDL/dom/formatting/prettyprint.py index c10b7cf87..4cbf00300 100644 --- a/pyGHDL/dom/formatting/prettyprint.py +++ b/pyGHDL/dom/formatting/prettyprint.py @@ -4,16 +4,12 @@ from pydecor import export from pyVHDLModel.VHDLModel import ( GenericInterfaceItem, - Expression, Direction, Mode, NamedEntity, PortInterfaceItem, - BinaryExpression, IdentityExpression, - UnaryExpression, - AggregateElement, - WithDefaultExpression, + WithDefaultExpression ) from pyGHDL import GHDLBaseException @@ -35,9 +31,7 @@ from pyGHDL.dom.InterfaceItem import ( from pyGHDL.dom.Symbol import ( SimpleSubTypeSymbol, ConstrainedSubTypeSymbol, - SimpleObjectSymbol, ) -from pyGHDL.dom.Literal import IntegerLiteral, CharacterLiteral, FloatingPointLiteral from pyGHDL.dom.Expression import ( SubtractionExpression, AdditionExpression, @@ -47,45 +41,11 @@ from pyGHDL.dom.Expression import ( AbsoluteExpression, NegationExpression, ExponentiationExpression, - Aggregate, ParenthesisExpression, ) -from pyGHDL.dom.Aggregates import ( - SimpleAggregateElement, - IndexedAggregateElement, - RangedAggregateElement, - NamedAggregateElement, - OthersAggregateElement, -) StringBuffer = List[str] -DirectionTranslation = {Direction.To: "to", Direction.DownTo: "downto"} - -ModeTranslation = { - Mode.In: "in", - Mode.Out: "out", - Mode.InOut: "inout", - Mode.Buffer: "buffer", - Mode.Linkage: "linkage", -} - -UnaryExpressionTranslation = { - IdentityExpression: (" +", ""), - NegationExpression: (" -", ""), - InverseExpression: ("not ", ""), - AbsoluteExpression: ("abs ", ""), - ParenthesisExpression: ("(", ")"), -} - -BinaryExpressionTranslation = { - AdditionExpression: ("", " + ", ""), - SubtractionExpression: ("", " - ", ""), - MultiplyExpression: ("", " * ", ""), - DivisionExpression: ("", " / ", ""), - ExponentiationExpression: ("", "**", ""), -} - @export class PrettyPrintException(GHDLBaseException): @@ -286,10 +246,10 @@ class PrettyPrint: prefix = " " * level buffer.append( - "{prefix} - {name} : {mode} {subtypeindication}{initialValue}".format( + "{prefix} - {name} : {mode!s} {subtypeindication}{initialValue}".format( prefix=prefix, name=generic.Name, - mode=ModeTranslation[generic.Mode], + mode=generic.Mode, subtypeindication=self.formatSubtypeIndication( generic.SubType, "generic", generic.Name ), @@ -306,10 +266,10 @@ class PrettyPrint: prefix = " " * level buffer.append( - "{prefix} - {name} : {mode} {subtypeindication}{initialValue}".format( + "{prefix} - {name} : {mode!s} {subtypeindication}{initialValue}".format( prefix=prefix, name=port.Name, - mode=ModeTranslation[port.Mode], + mode=port.Mode, subtypeindication=self.formatSubtypeIndication( port.SubType, "port", port.Name ), @@ -379,81 +339,7 @@ class PrettyPrint: if item.DefaultExpression is None: return "" - return " := {expr}".format(expr=self.formatExpression(item.DefaultExpression)) + return " := {expr!s}".format(expr=item.DefaultExpression) def formatRange(self, r: Range): - return "{left} {dir} {right}".format( - left=self.formatExpression(r.LeftBound), - right=self.formatExpression(r.RightBound), - dir=DirectionTranslation[r.Direction], - ) - - def formatExpression(self, expression: Expression) -> str: - if isinstance(expression, SimpleObjectSymbol): - return "{name}".format(name=expression.SymbolName) - elif isinstance(expression, IntegerLiteral): - return "{value}".format(value=expression.Value) - elif isinstance(expression, FloatingPointLiteral): - return "{value}".format(value=expression.Value) - elif isinstance(expression, CharacterLiteral): - return "'{value}'".format(value=expression.Value) - elif isinstance(expression, UnaryExpression): - try: - operator = UnaryExpressionTranslation[type(expression)] - except KeyError: - raise PrettyPrintException("Unhandled operator for unary expression.") - - return "{leftOp}{operand}{rightOp}".format( - leftOp=operator[0], - rightOp=operator[1], - operand=self.formatExpression(expression.Operand), - ) - elif isinstance(expression, BinaryExpression): - try: - operator = BinaryExpressionTranslation[type(expression)] - except KeyError: - raise PrettyPrintException("Unhandled operator for binary expression.") - - return "{leftOp}{leftExpr}{middleOp}{rightExpr}{rightOp}".format( - leftOp=operator[0], - middleOp=operator[1], - rightOp=operator[2], - leftExpr=self.formatExpression(expression.LeftOperand), - rightExpr=self.formatExpression(expression.RightOperand), - ) - elif isinstance(expression, Aggregate): - return "({choices})".format( - choices=", ".join( - [ - self.formatAggregateElement(element) - for element in expression.Elements - ] - ) - ) - else: - raise PrettyPrintException("Unhandled expression kind.") - - def formatAggregateElement(self, aggregateElement: AggregateElement): - if isinstance(aggregateElement, SimpleAggregateElement): - return "{value}".format( - value=self.formatExpression(aggregateElement.Expression) - ) - elif isinstance(aggregateElement, IndexedAggregateElement): - return "{index} => {value}".format( - index=self.formatExpression(aggregateElement.Index), - value=self.formatExpression(aggregateElement.Expression), - ) - elif isinstance(aggregateElement, RangedAggregateElement): - return "{range} => {value}".format( - range=self.formatRange(aggregateElement.Range), - value=self.formatExpression(aggregateElement.Expression), - ) - elif isinstance(aggregateElement, NamedAggregateElement): - return "{name} => {value}".format( - name=aggregateElement.Name, - value=self.formatExpression(aggregateElement.Expression), - ) - elif isinstance(aggregateElement, OthersAggregateElement): - return "other => {value}".format( - value=self.formatExpression(aggregateElement.Expression) - ) + return str(r) -- cgit v1.2.3 From 90751795e5164365b247be18d5c97e34932637fe Mon Sep 17 00:00:00 2001 From: Patrick Lehmann Date: Sat, 19 Jun 2021 12:35:41 +0200 Subject: Fixed a black issue. --- pyGHDL/dom/formatting/prettyprint.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'pyGHDL/dom') diff --git a/pyGHDL/dom/formatting/prettyprint.py b/pyGHDL/dom/formatting/prettyprint.py index 4cbf00300..08f934fd6 100644 --- a/pyGHDL/dom/formatting/prettyprint.py +++ b/pyGHDL/dom/formatting/prettyprint.py @@ -9,7 +9,7 @@ from pyVHDLModel.VHDLModel import ( NamedEntity, PortInterfaceItem, IdentityExpression, - WithDefaultExpression + WithDefaultExpression, ) from pyGHDL import GHDLBaseException -- cgit v1.2.3 From 3f3cf203c02671ab4d181d8d74aac2c3cc2c7c5c Mon Sep 17 00:00:00 2001 From: Patrick Lehmann Date: Sat, 19 Jun 2021 14:04:02 +0200 Subject: Fixed missed renaming. Removed formatRange. --- pyGHDL/dom/formatting/prettyprint.py | 33 +++++---------------------------- 1 file changed, 5 insertions(+), 28 deletions(-) (limited to 'pyGHDL/dom') diff --git a/pyGHDL/dom/formatting/prettyprint.py b/pyGHDL/dom/formatting/prettyprint.py index 08f934fd6..1577edca0 100644 --- a/pyGHDL/dom/formatting/prettyprint.py +++ b/pyGHDL/dom/formatting/prettyprint.py @@ -4,11 +4,8 @@ from pydecor import export from pyVHDLModel.VHDLModel import ( GenericInterfaceItem, - Direction, - Mode, NamedEntity, PortInterfaceItem, - IdentityExpression, WithDefaultExpression, ) @@ -23,7 +20,6 @@ from pyGHDL.dom.DesignUnit import ( Context, ) from pyGHDL.dom.Object import Constant, Signal -from pyGHDL.dom.Range import Range from pyGHDL.dom.InterfaceItem import ( GenericConstantInterfaceItem, PortSignalInterfaceItem, @@ -32,17 +28,7 @@ from pyGHDL.dom.Symbol import ( SimpleSubTypeSymbol, ConstrainedSubTypeSymbol, ) -from pyGHDL.dom.Expression import ( - SubtractionExpression, - AdditionExpression, - MultiplyExpression, - DivisionExpression, - InverseExpression, - AbsoluteExpression, - NegationExpression, - ExponentiationExpression, - ParenthesisExpression, -) + StringBuffer = List[str] @@ -291,7 +277,7 @@ class PrettyPrint: subtype=self.formatSubtypeIndication( item.SubType, "constant", item.Name ), - expr=self.formatExpression(item.DefaultExpression), + expr=str(item.DefaultExpression), ) ) elif isinstance(item, Signal): @@ -302,9 +288,7 @@ class PrettyPrint: subtype=self.formatSubtypeIndication( item.SubType, "signal", item.Name ), - initValue=" := {expr}".format( - expr=self.formatExpression(item.DefaultExpression) - ) + initValue=" := {expr}".format(expr=str(item.DefaultExpression)) if item.DefaultExpression is not None else "", ) @@ -318,12 +302,8 @@ class PrettyPrint: if isinstance(subTypeIndication, SimpleSubTypeSymbol): return "{type}".format(type=subTypeIndication.SymbolName) elif isinstance(subTypeIndication, ConstrainedSubTypeSymbol): - constraints = ", ".join( - [ - self.formatRange(constraint.Range) - for constraint in subTypeIndication.Constraints - ] - ) + ranges = [str(c.Range) for c in subTypeIndication.Constraints] + constraints = ", ".join(ranges) return "{type}({constraints})".format( type=subTypeIndication.SymbolName, constraints=constraints @@ -340,6 +320,3 @@ class PrettyPrint: return "" return " := {expr!s}".format(expr=item.DefaultExpression) - - def formatRange(self, r: Range): - return str(r) -- cgit v1.2.3