From f041824100c87e65ae8aaa92dff01988b6fbc94f Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sun, 12 Feb 2023 18:36:45 +0100
Subject: testsuite/gna: add tests for #2350

---
 testsuite/gna/issue2350/test.vhdl    | 26 ++++++++++++++++++++++++++
 testsuite/gna/issue2350/test2.vhdl   | 20 ++++++++++++++++++++
 testsuite/gna/issue2350/test3.vhdl   | 20 ++++++++++++++++++++
 testsuite/gna/issue2350/test4.vhdl   | 12 ++++++++++++
 testsuite/gna/issue2350/test5.vhdl   | 21 +++++++++++++++++++++
 testsuite/gna/issue2350/test6.vhdl   | 16 ++++++++++++++++
 testsuite/gna/issue2350/test7.vhdl   | 15 +++++++++++++++
 testsuite/gna/issue2350/testsuite.sh | 26 ++++++++++++++++++++++++++
 8 files changed, 156 insertions(+)
 create mode 100644 testsuite/gna/issue2350/test.vhdl
 create mode 100644 testsuite/gna/issue2350/test2.vhdl
 create mode 100644 testsuite/gna/issue2350/test3.vhdl
 create mode 100644 testsuite/gna/issue2350/test4.vhdl
 create mode 100644 testsuite/gna/issue2350/test5.vhdl
 create mode 100644 testsuite/gna/issue2350/test6.vhdl
 create mode 100644 testsuite/gna/issue2350/test7.vhdl
 create mode 100755 testsuite/gna/issue2350/testsuite.sh

diff --git a/testsuite/gna/issue2350/test.vhdl b/testsuite/gna/issue2350/test.vhdl
new file mode 100644
index 000000000..65df6b825
--- /dev/null
+++ b/testsuite/gna/issue2350/test.vhdl
@@ -0,0 +1,26 @@
+library ieee ;
+    use ieee.std_logic_1164.all ;
+    use ieee.numeric_std.all ;
+
+entity test is
+end entity ;
+
+architecture arch of test is
+
+    type cx_t is record
+        re : signed ;
+        im : signed ;
+    end record ;
+
+    subtype c16_t is cx_t( re(15 downto 0), im(15 downto 0) ) ;
+
+    constant x : c16_t := ( re => to_signed(0, 16), im => to_signed(0, 17) ) ;
+
+begin
+
+    tb : process
+    begin
+        std.env.stop ;
+    end process ;
+
+end architecture ;
diff --git a/testsuite/gna/issue2350/test2.vhdl b/testsuite/gna/issue2350/test2.vhdl
new file mode 100644
index 000000000..b66cf429e
--- /dev/null
+++ b/testsuite/gna/issue2350/test2.vhdl
@@ -0,0 +1,20 @@
+library ieee ;
+    use ieee.std_logic_1164.all ;
+    use ieee.numeric_std.all ;
+
+entity test2 is
+end entity ;
+
+architecture arch of test2 is
+
+    type cx_t is record
+        re : signed (15 downto 0);
+        im : signed (15 downto 0);
+    end record ;
+
+--    subtype c16_t is cx_t( re(15 downto 0), im(15 downto 0) ) ;
+
+    constant x : cx_t := ( re => to_signed(0, 16), im => to_signed(0, 17) ) ;
+
+begin
+end architecture ;
diff --git a/testsuite/gna/issue2350/test3.vhdl b/testsuite/gna/issue2350/test3.vhdl
new file mode 100644
index 000000000..117024484
--- /dev/null
+++ b/testsuite/gna/issue2350/test3.vhdl
@@ -0,0 +1,20 @@
+library ieee ;
+    use ieee.std_logic_1164.all ;
+    use ieee.numeric_std.all ;
+
+entity test3 is
+end entity ;
+
+architecture arch of test3 is
+
+    type cx_t is record
+        re : signed (15 downto 0);
+        im : signed (15 downto 0);
+    end record ;
+
+--    subtype c16_t is cx_t( re(15 downto 0), im(15 downto 0) ) ;
+
+    constant x : cx_t := ( re => to_signed(0, 16), im => "00000001000000010" ) ;
+
+begin
+end architecture ;
diff --git a/testsuite/gna/issue2350/test4.vhdl b/testsuite/gna/issue2350/test4.vhdl
new file mode 100644
index 000000000..6fd3de42a
--- /dev/null
+++ b/testsuite/gna/issue2350/test4.vhdl
@@ -0,0 +1,12 @@
+library ieee ;
+    use ieee.std_logic_1164.all ;
+    use ieee.numeric_std.all ;
+
+entity test4 is
+end entity ;
+
+architecture arch of test4 is
+
+    constant x : signed(15 downto 0) := to_signed(0, 17);
+begin
+end architecture ;
diff --git a/testsuite/gna/issue2350/test5.vhdl b/testsuite/gna/issue2350/test5.vhdl
new file mode 100644
index 000000000..52896eea2
--- /dev/null
+++ b/testsuite/gna/issue2350/test5.vhdl
@@ -0,0 +1,21 @@
+library ieee ;
+    use ieee.std_logic_1164.all ;
+    use ieee.numeric_std.all ;
+
+entity test5 is
+end entity ;
+
+architecture arch of test5 is
+
+    type cx_t is record
+        re : signed (15 downto 0);
+        im : signed (15 downto 0);
+    end record ;
+
+--    subtype c16_t is cx_t( re(15 downto 0), im(15 downto 0) ) ;
+
+    constant a : signed(16 downto 0) := "00000001000000010"; --(others => '0');
+    constant x : cx_t := ( re => to_signed(0, 16), im => a);
+
+begin
+end architecture ;
diff --git a/testsuite/gna/issue2350/test6.vhdl b/testsuite/gna/issue2350/test6.vhdl
new file mode 100644
index 000000000..e3c991ea5
--- /dev/null
+++ b/testsuite/gna/issue2350/test6.vhdl
@@ -0,0 +1,16 @@
+library ieee ;
+    use ieee.std_logic_1164.all ;
+    use ieee.numeric_std.all ;
+
+entity test6 is
+end entity ;
+
+architecture arch of test6 is
+
+    type cx_t is array (1 to 2) of signed (15 downto 0);
+
+    constant a : signed(16 downto 0) := "00000001000000010"; --(others => '0');
+    constant x : cx_t := ( 1 => to_signed(0, 16), 2 => a);
+
+begin
+end architecture ;
diff --git a/testsuite/gna/issue2350/test7.vhdl b/testsuite/gna/issue2350/test7.vhdl
new file mode 100644
index 000000000..e11354f2c
--- /dev/null
+++ b/testsuite/gna/issue2350/test7.vhdl
@@ -0,0 +1,15 @@
+library ieee ;
+    use ieee.std_logic_1164.all ;
+    use ieee.numeric_std.all ;
+
+entity test7 is
+end entity ;
+
+architecture arch of test7 is
+
+    type cx_t is array (1 to 2) of signed (15 downto 0);
+
+    constant x : cx_t := ( 1 => to_signed(0, 16), 2 => to_signed(0, 17));
+
+begin
+end architecture ;
diff --git a/testsuite/gna/issue2350/testsuite.sh b/testsuite/gna/issue2350/testsuite.sh
new file mode 100755
index 000000000..9ced4d5ef
--- /dev/null
+++ b/testsuite/gna/issue2350/testsuite.sh
@@ -0,0 +1,26 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze test.vhdl
+elab_simulate_failure test
+
+analyze_failure -Werror=runtime-error test.vhdl
+analyze_failure -Werror=runtime-error test2.vhdl
+
+# Humm duplicate error
+analyze_failure -Werror=runtime-error test3.vhdl
+#analyze test3.vhdl
+
+analyze_failure -Werror=runtime-error test4.vhdl
+
+analyze_failure -Werror=runtime-error test5.vhdl
+
+analyze_failure -Werror=runtime-error test6.vhdl
+
+analyze_failure -Werror=runtime-error test7.vhdl
+
+clean
+
+echo "Test successful"
-- 
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