From ea5b2080161b28544b32797f2a21afca64d2f185 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Thu, 11 Nov 2021 05:06:27 +0100 Subject: synth: handle ror from numeric_std. Fix #1909 --- src/synth/synth-vhdl_oper.adb | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/synth/synth-vhdl_oper.adb b/src/synth/synth-vhdl_oper.adb index c576f2fee..ee30c84d4 100644 --- a/src/synth/synth-vhdl_oper.adb +++ b/src/synth/synth-vhdl_oper.adb @@ -1587,6 +1587,7 @@ package body Synth.Vhdl_Oper is when Iir_Predefined_Ieee_Std_Logic_Arith_Ge_Sgn_Uns => -- ">=" (Signed, Unsigned) return Synth_Compare_Sgn_Uns (Id_Sge, Expr_Typ); + when Iir_Predefined_Ieee_Numeric_Std_Sra_Sgn_Int => return Synth_Shift (Id_Asr, Id_Lsl); @@ -1600,7 +1601,9 @@ package body Synth.Vhdl_Oper is | Iir_Predefined_Ieee_1164_Vector_Srl => return Synth_Shift (Id_Lsr, Id_Lsl); - when Iir_Predefined_Ieee_1164_Vector_Ror => + when Iir_Predefined_Ieee_Numeric_Std_Ror_Uns_Int + | Iir_Predefined_Ieee_Numeric_Std_Ror_Sgn_Int + | Iir_Predefined_Ieee_1164_Vector_Ror => return Synth_Rotation (Id_Ror); when others => -- cgit v1.2.3