From e501fff275b91610a202ce029cd3c0de416fa153 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Mon, 23 Apr 2018 04:38:06 +0200 Subject: Add reproducer for previous commit. --- testsuite/gna/bug088/assemble.vhdl | 37 +++++++++++++++++++++++++++++++++++++ testsuite/gna/bug088/testsuite.sh | 9 +++++++++ 2 files changed, 46 insertions(+) create mode 100644 testsuite/gna/bug088/assemble.vhdl create mode 100755 testsuite/gna/bug088/testsuite.sh diff --git a/testsuite/gna/bug088/assemble.vhdl b/testsuite/gna/bug088/assemble.vhdl new file mode 100644 index 000000000..e47c5b3dd --- /dev/null +++ b/testsuite/gna/bug088/assemble.vhdl @@ -0,0 +1,37 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity assemble is + port ( + A: in std_logic_vector(31 downto 0); + B: in std_logic_vector(31 downto 0); + C: in std_logic_vector(31 downto 0); + F: out std_logic_vector(31 downto 0) + ); +end entity; + +architecture foo of assemble is + + type std_logic_2d is array + (integer range <>, integer range <>) of std_logic; + + signal data: std_logic_2d (31 downto 0, 2 downto 0); + + function to_std_logic_2d (i0,i1,i2: std_logic_vector (31 downto 0)) + return std_logic_2d is + variable retdat: std_logic_2d (data'range(0), data'range(1)); + begin + for i in i0'range loop + retdat(i, 0) := i0(i); + retdat(i, 1) := i1(i); + retdat(i, 2) := i2(i); + end loop; + return retdat; + end function; + +begin + + data <= to_std_logic_2d(A, B, C); + F <= (others => data (15, 1)); -- B(15) + + end architecture; diff --git a/testsuite/gna/bug088/testsuite.sh b/testsuite/gna/bug088/testsuite.sh new file mode 100755 index 000000000..8d75b885c --- /dev/null +++ b/testsuite/gna/bug088/testsuite.sh @@ -0,0 +1,9 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze_failure assemble.vhdl + +clean + +echo "Test successful" -- cgit v1.2.3