From e27f34463e29f83a2bf1c4db140773326cdcf1fd Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Wed, 13 Apr 2022 21:20:08 +0200 Subject: testsuite/synth: add a test for #2034 --- testsuite/synth/issue2034/cdc_fifo_rtl.vhdl | 7 +++++++ testsuite/synth/issue2034/cdc_fifo_rtl_formal.psl | 7 +++++++ testsuite/synth/issue2034/testsuite.sh | 8 ++++++++ 3 files changed, 22 insertions(+) create mode 100644 testsuite/synth/issue2034/cdc_fifo_rtl.vhdl create mode 100644 testsuite/synth/issue2034/cdc_fifo_rtl_formal.psl create mode 100755 testsuite/synth/issue2034/testsuite.sh diff --git a/testsuite/synth/issue2034/cdc_fifo_rtl.vhdl b/testsuite/synth/issue2034/cdc_fifo_rtl.vhdl new file mode 100644 index 000000000..4c5f2c1af --- /dev/null +++ b/testsuite/synth/issue2034/cdc_fifo_rtl.vhdl @@ -0,0 +1,7 @@ + +ENTITY cdc_fifo IS +END ENTITY; + +ARCHITECTURE rtl OF cdc_fifo IS +BEGIN +END ARCHITECTURE; diff --git a/testsuite/synth/issue2034/cdc_fifo_rtl_formal.psl b/testsuite/synth/issue2034/cdc_fifo_rtl_formal.psl new file mode 100644 index 000000000..11660940e --- /dev/null +++ b/testsuite/synth/issue2034/cdc_fifo_rtl_formal.psl @@ -0,0 +1,7 @@ + +library ieee; +use ieee.std_logic_1164.all; + +vunit cdc_fifo_rtl_formal (cdc_fifo(rtl)) { + TYPE f_array IS ARRAY (1 DOWNTO 0) OF std_logic; +} diff --git a/testsuite/synth/issue2034/testsuite.sh b/testsuite/synth/issue2034/testsuite.sh new file mode 100755 index 000000000..827f3ed9a --- /dev/null +++ b/testsuite/synth/issue2034/testsuite.sh @@ -0,0 +1,8 @@ +#! /bin/sh + +. ../../testenv.sh + +export GHDL_STD_FLAGS=--std=08 +synth cdc_fifo_rtl.vhdl cdc_fifo_rtl_formal.psl -e > syn_cdc_fifo.vhdl + +echo "Test successful" -- cgit v1.2.3