From d0e80a90cd97e60164eaa0d97e0d17676880e4bf Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Mon, 13 Apr 2020 06:19:01 +0200
Subject: testsuite/synth: add test for #1221

---
 testsuite/synth/issue1221/testsuite.sh |  8 ++++++++
 testsuite/synth/issue1221/top.vhdl     | 15 +++++++++++++++
 2 files changed, 23 insertions(+)
 create mode 100755 testsuite/synth/issue1221/testsuite.sh
 create mode 100644 testsuite/synth/issue1221/top.vhdl

diff --git a/testsuite/synth/issue1221/testsuite.sh b/testsuite/synth/issue1221/testsuite.sh
new file mode 100755
index 000000000..88de793a8
--- /dev/null
+++ b/testsuite/synth/issue1221/testsuite.sh
@@ -0,0 +1,8 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+synth_analyze top
+clean
+
+echo "Test successful"
diff --git a/testsuite/synth/issue1221/top.vhdl b/testsuite/synth/issue1221/top.vhdl
new file mode 100644
index 000000000..ef9dd4312
--- /dev/null
+++ b/testsuite/synth/issue1221/top.vhdl
@@ -0,0 +1,15 @@
+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+use IEEE.NUMERIC_STD.ALL;
+
+entity top is
+	port(
+		a : in unsigned(7 downto 0);
+		q : out unsigned(7 downto 0)
+	);
+end entity;
+
+architecture arch of top is
+begin
+	q <= 0 - a;
+end architecture;
-- 
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