From ca39821dc013a877a8dbdfabbc3b861eb4d4d2e3 Mon Sep 17 00:00:00 2001 From: Patrick Lehmann Date: Mon, 26 Jul 2021 00:13:11 +0200 Subject: Adjusted to renaming in pyVHDLModel. --- pyGHDL/cli/requirements.txt | 6 +-- pyGHDL/dom/Aggregates.py | 4 +- pyGHDL/dom/Attribute.py | 4 +- pyGHDL/dom/DesignUnit.py | 2 +- pyGHDL/dom/Expression.py | 6 +-- pyGHDL/dom/InterfaceItem.py | 2 +- pyGHDL/dom/Literal.py | 4 +- pyGHDL/dom/Misc.py | 4 +- pyGHDL/dom/Names.py | 4 +- pyGHDL/dom/NonStandard.py | 4 +- pyGHDL/dom/Object.py | 4 +- pyGHDL/dom/PSL.py | 1 - pyGHDL/dom/Range.py | 7 +--- pyGHDL/dom/Subprogram.py | 2 +- pyGHDL/dom/Symbol.py | 2 +- pyGHDL/dom/Type.py | 2 +- pyGHDL/dom/_Translate.py | 10 ++--- pyGHDL/dom/_Utils.py | 8 ++-- pyGHDL/dom/formatting/__init__.py | 32 +++++++++++++++ pyGHDL/dom/formatting/prettyprint.py | 78 +++++++++++++++++++++++++----------- pyGHDL/dom/requirements.txt | 4 +- testsuite/pyunit/dom/Literals.py | 2 +- 22 files changed, 125 insertions(+), 67 deletions(-) diff --git a/pyGHDL/cli/requirements.txt b/pyGHDL/cli/requirements.txt index 4ea0fb1fd..30f22625c 100644 --- a/pyGHDL/cli/requirements.txt +++ b/pyGHDL/cli/requirements.txt @@ -1,5 +1,5 @@ -r ../dom/requirements.txt -pyAttributes==2.1.0 -pyMetaClasses==1.2.1 -pyTerminalUI==1.3.4 +pyAttributes==2.2.1 +pyMetaClasses==1.3.1 +pyTerminalUI==1.4.1 diff --git a/pyGHDL/dom/Aggregates.py b/pyGHDL/dom/Aggregates.py index 87bc44360..6ca0734e7 100644 --- a/pyGHDL/dom/Aggregates.py +++ b/pyGHDL/dom/Aggregates.py @@ -9,7 +9,7 @@ # Authors: # Patrick Lehmann # -# Package module: DOM: VHDL design units (e.g. context or package). +# Package module: DOM: Aggregates. # # License: # ============================================================================ @@ -41,7 +41,7 @@ This module contains all DOM classes for VHDL's design units (:class:`context . +# +# SPDX-License-Identifier: GPL-2.0-or-later +# ============================================================================ diff --git a/pyGHDL/dom/formatting/prettyprint.py b/pyGHDL/dom/formatting/prettyprint.py index 4d6e5dccb..949935b3f 100644 --- a/pyGHDL/dom/formatting/prettyprint.py +++ b/pyGHDL/dom/formatting/prettyprint.py @@ -1,25 +1,40 @@ +# ============================================================================= +# ____ _ _ ____ _ _ +# _ __ _ _ / ___| | | | _ \| | __| | ___ _ __ ___ +# | '_ \| | | | | _| |_| | | | | | / _` |/ _ \| '_ ` _ \ +# | |_) | |_| | |_| | _ | |_| | |___ | (_| | (_) | | | | | | +# | .__/ \__, |\____|_| |_|____/|_____(_)__,_|\___/|_| |_| |_| +# |_| |___/ +# ============================================================================= +# Authors: +# Patrick Lehmann +# +# Package module: A pretty printer to format the DOM as a tree in text form. +# +# License: +# ============================================================================ +# Copyright (C) 2019-2021 Tristan Gingold +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# SPDX-License-Identifier: GPL-2.0-or-later +# ============================================================================ from typing import List, Union from pydecor import export -from pyGHDL.dom.Attribute import Attribute, AttributeSpecification -from pyGHDL.dom.Misc import Alias -from pyGHDL.dom.PSL import DefaultClock -from pyGHDL.dom.Subprogram import Procedure -from pyGHDL.dom.Type import ( - IntegerType, - Subtype, - ArrayType, - RecordType, - AccessType, - EnumeratedType, - FileType, - ProtectedType, - ProtectedTypeBody, - PhysicalType, - IncompleteType, -) -from pyVHDLModel.VHDLModel import ( +from pyVHDLModel.SyntaxModel import ( GenericInterfaceItem, NamedEntity, PortInterfaceItem, @@ -42,16 +57,33 @@ from pyGHDL.dom.DesignUnit import ( UseClause, PackageInstantiation, ) -from pyGHDL.dom.Object import Constant, Signal, SharedVariable, File +from pyGHDL.dom.Symbol import ( + SimpleSubtypeSymbol, + ConstrainedCompositeSubtypeSymbol, +) +from pyGHDL.dom.Type import ( + IntegerType, + Subtype, + ArrayType, + RecordType, + AccessType, + EnumeratedType, + FileType, + ProtectedType, + ProtectedTypeBody, + PhysicalType, + IncompleteType, +) from pyGHDL.dom.InterfaceItem import ( GenericConstantInterfaceItem, PortSignalInterfaceItem, GenericTypeInterfaceItem, ) -from pyGHDL.dom.Symbol import ( - SimpleSubtypeSymbol, - ConstrainedCompositeSubtypeSymbol, -) +from pyGHDL.dom.Object import Constant, Signal, SharedVariable, File +from pyGHDL.dom.Attribute import Attribute, AttributeSpecification +from pyGHDL.dom.Subprogram import Procedure +from pyGHDL.dom.Misc import Alias +from pyGHDL.dom.PSL import DefaultClock StringBuffer = List[str] diff --git a/pyGHDL/dom/requirements.txt b/pyGHDL/dom/requirements.txt index 66e3025ae..ca2a796ac 100644 --- a/pyGHDL/dom/requirements.txt +++ b/pyGHDL/dom/requirements.txt @@ -1,4 +1,4 @@ -r ../libghdl/requirements.txt -pyVHDLModel==0.11.1 -#https://github.com/VHDL/pyVHDLModel/archive/dev.zip#pyVHDLModel +#pyVHDLModel==0.11.2 +https://github.com/VHDL/pyVHDLModel/archive/dev.zip#pyVHDLModel diff --git a/testsuite/pyunit/dom/Literals.py b/testsuite/pyunit/dom/Literals.py index 418a1b76d..febfd4294 100644 --- a/testsuite/pyunit/dom/Literals.py +++ b/testsuite/pyunit/dom/Literals.py @@ -34,7 +34,7 @@ from pathlib import Path from textwrap import dedent from unittest import TestCase -from pyVHDLModel.VHDLModel import Expression +from pyVHDLModel.SyntaxModel import Expression from pyGHDL.dom.DesignUnit import Package -- cgit v1.2.3