From b45295888fb56576468d9ead8fe214424f692e25 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Thu, 16 Apr 2020 18:23:44 +0200
Subject: testsuite/synth: add test for #1230

---
 testsuite/synth/issue1230/delayline.vhdl | 34 ++++++++++++++++++++++++++++++++
 testsuite/synth/issue1230/testsuite.sh   |  7 +++++++
 2 files changed, 41 insertions(+)
 create mode 100644 testsuite/synth/issue1230/delayline.vhdl
 create mode 100755 testsuite/synth/issue1230/testsuite.sh

diff --git a/testsuite/synth/issue1230/delayline.vhdl b/testsuite/synth/issue1230/delayline.vhdl
new file mode 100644
index 000000000..153dd5916
--- /dev/null
+++ b/testsuite/synth/issue1230/delayline.vhdl
@@ -0,0 +1,34 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity DelayLine is
+  generic (
+    Depth : natural := 2;
+    Width : natural := 16
+    );
+  
+  port(
+    din  : in  signed(Width-1 downto 0);
+    clk  : in  std_logic;
+    ce   : in  std_logic;
+    dout : out signed(Width-1 downto 0)
+    );
+end DelayLine;
+
+architecture behavioral of DelayLine is
+  type DelayType is array (0 to Depth-1) of signed(Width-1 downto 0);
+  signal DataBuffer : DelayType;
+begin
+  dout <= DataBuffer(Depth-1);
+  
+  process (clk)
+  begin
+    if rising_edge (clk) then
+      if (ce = '1') then
+        DataBuffer(0) <= din;
+        DataBuffer(1 to Depth-1) <= DataBuffer(0 to Depth-2); --XX
+      end if;
+    end if;
+  end process;
+end behavioral;
diff --git a/testsuite/synth/issue1230/testsuite.sh b/testsuite/synth/issue1230/testsuite.sh
new file mode 100755
index 000000000..547b21877
--- /dev/null
+++ b/testsuite/synth/issue1230/testsuite.sh
@@ -0,0 +1,7 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+synth -gdepth=1 DelayLine.vhdl -e > syn_delayline.vhdl
+
+echo "Test successful"
-- 
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