From 919645ce03bacb136318ac96ddf920dfc267eeeb Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Sun, 16 May 2021 10:04:23 +0200 Subject: trans-chap4: add comments --- src/vhdl/translate/trans-chap4.adb | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/vhdl/translate/trans-chap4.adb b/src/vhdl/translate/trans-chap4.adb index 37ca1646b..5a412dd08 100644 --- a/src/vhdl/translate/trans-chap4.adb +++ b/src/vhdl/translate/trans-chap4.adb @@ -2864,6 +2864,7 @@ package body Trans.Chap4 is (El_List, Conv_Info.Instance_Field, Wki_Instance, Block_Info.Block_Decls_Ptr_Type); + -- Add instance field for the entity in case of direct instantiation. if Entity /= Null_Iir then Conv_Info.Instantiated_Entity := Entity; Entity_Info := Get_Info (Entity); @@ -3137,6 +3138,9 @@ package body Trans.Chap4 is end loop; end Translate_Association_Subprograms; + -- Register conversion CONV in association between SIG_IN and SIG_OUT. + -- This procedure allocates a record data (described by INFO), fill it + -- with addresses of signals and register it to REG_SUBPRG. procedure Elab_Conversion (Sig_In : Iir; Sig_Out : Iir; Conv : Iir; -- cgit v1.2.3