From 7e36182602ff1a2c43723240860029ad8ae007b5 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Mon, 18 Oct 2021 07:48:03 +0200 Subject: synth-static_oper: handle or/and reduce operators for unsigned. Fix #1896 --- src/synth/synth-static_oper.adb | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/synth/synth-static_oper.adb b/src/synth/synth-static_oper.adb index 2b9b5ffab..5eba9c8fb 100644 --- a/src/synth/synth-static_oper.adb +++ b/src/synth/synth-static_oper.adb @@ -721,7 +721,11 @@ package body Synth.Static_Oper is (Std_Ulogic'Pos (Not_Table (Read_Std_Logic (Operand.Mem, 0))), Oper_Typ); - when Iir_Predefined_Ieee_1164_Or_Suv => + when Iir_Predefined_Ieee_Numeric_Std_And_Uns => + return Synth_Vector_Reduce ('1', Operand, And_Table); + + when Iir_Predefined_Ieee_1164_Or_Suv + | Iir_Predefined_Ieee_Numeric_Std_Or_Uns => return Synth_Vector_Reduce ('0', Operand, Or_Table); when Iir_Predefined_Ieee_1164_Xor_Suv => return Synth_Vector_Reduce ('0', Operand, Xor_Table); -- cgit v1.2.3