From 6ffcbcbcf7c34ab6d1f71a73173b0af271892901 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Tue, 24 Dec 2019 18:00:24 +0100 Subject: vhdl: recognize ieee.std_logic_1164.is_x. --- python/libghdl/thin/std_names.py | 373 +++++++++++++++++----------------- python/libghdl/thin/vhdl/nodes.py | 320 ++++++++++++++--------------- src/std_names.adb | 1 + src/std_names.ads | 17 +- src/vhdl/vhdl-ieee-std_logic_1164.adb | 6 + src/vhdl/vhdl-nodes.ads | 3 + 6 files changed, 367 insertions(+), 353 deletions(-) diff --git a/python/libghdl/thin/std_names.py b/python/libghdl/thin/std_names.py index 27639788f..3dca3b712 100644 --- a/python/libghdl/thin/std_names.py +++ b/python/libghdl/thin/std_names.py @@ -592,189 +592,190 @@ class Name: Rotate_Left = 806 Rotate_Right = 807 To_Bitvector = 808 - Conv_Signed = 809 - Conv_Unsigned = 810 - Conv_Integer = 811 - Math_Real = 812 - Ceil = 813 - Log2 = 814 - Sin = 815 - Cos = 816 - Last_Ieee = 816 - First_Synthesis = 817 - Allconst = 817 - Allseq = 818 - Anyconst = 819 - Anyseq = 820 - Last_Synthesis = 820 - First_Directive = 821 - Define = 821 - Endif = 822 - Ifdef = 823 - Ifndef = 824 - Include = 825 - Timescale = 826 - Undef = 827 - Protect = 828 - Begin_Protected = 829 - End_Protected = 830 - Key_Block = 831 - Data_Block = 832 - Line = 833 - Celldefine = 834 - Endcelldefine = 835 - Default_Nettype = 836 - Resetall = 837 - Last_Directive = 837 - First_Systask = 838 - Bits = 838 - D_Root = 839 - D_Unit = 840 - Last_Systask = 840 - First_SV_Method = 841 - Size = 841 - Insert = 842 - Delete = 843 - Pop_Front = 844 - Pop_Back = 845 - Push_Front = 846 - Push_Back = 847 - Name = 848 - Len = 849 - Substr = 850 - Exists = 851 - Atoi = 852 - Itoa = 853 - Find = 854 - Find_Index = 855 - Find_First = 856 - Find_First_Index = 857 - Find_Last = 858 - Find_Last_Index = 859 - Num = 860 - Randomize = 861 - Pre_Randomize = 862 - Post_Randomize = 863 - Srandom = 864 - Get_Randstate = 865 - Set_Randstate = 866 - Seed = 867 - State = 868 - Last_SV_Method = 868 - First_BSV = 869 - uAction = 869 - uActionValue = 870 - BVI = 871 - uC = 872 - uCF = 873 - uE = 874 - uSB = 875 - uSBR = 876 - Action = 877 - Endaction = 878 - Actionvalue = 879 - Endactionvalue = 880 - Ancestor = 881 - Clocked_By = 882 - Default_Clock = 883 - Default_Reset = 884 - Dependencies = 885 - Deriving = 886 - Determines = 887 - Enable = 888 - Ifc_Inout = 889 - Input_Clock = 890 - Input_Reset = 891 - Instance = 892 - Endinstance = 893 - Let = 894 - Match = 895 - Method = 896 - Endmethod = 897 - Numeric = 898 - Output_Clock = 899 - Output_Reset = 900 - Par = 901 - Endpar = 902 - Path = 903 - Provisos = 904 - Ready = 905 - Reset_By = 906 - Rule = 907 - Endrule = 908 - Rules = 909 - Endrules = 910 - Same_Family = 911 - Schedule = 912 - Seq = 913 - Endseq = 914 - Typeclass = 915 - Endtypeclass = 916 - Valueof = 917 - uValueof = 918 - Last_BSV = 918 - First_Comment = 919 - Psl = 919 - Pragma = 920 - Synthesis = 921 - Synopsys = 922 - Translate_Off = 923 - Translate_On = 924 - Last_Comment = 924 - First_PSL = 925 - A = 925 - Af = 926 - Ag = 927 - Ax = 928 - Abort = 929 - Assume_Guarantee = 930 - Before = 931 - Clock = 932 - E = 933 - Ef = 934 - Eg = 935 - Ex = 936 - Endpoint = 937 - Eventually = 938 - Fairness = 939 - Fell = 940 - Forall = 941 - G = 942 - Inf = 943 - Inherit = 944 - Never = 945 - Next_A = 946 - Next_E = 947 - Next_Event = 948 - Next_Event_A = 949 - Next_Event_E = 950 - Prev = 951 - Rose = 952 - Strong = 953 - W = 954 - Whilenot = 955 - Within = 956 - X = 957 - Last_PSL = 957 - First_Edif = 958 - Celltype = 968 - View = 969 - Viewtype = 970 - Direction = 971 - Contents = 972 - Net = 973 - Viewref = 974 - Cellref = 975 - Libraryref = 976 - Portinstance = 977 - Joined = 978 - Portref = 979 - Instanceref = 980 - Design = 981 - Designator = 982 - Owner = 983 - Member = 984 - Number = 985 - Rename = 986 - Userdata = 987 - Last_Edif = 987 + Is_X = 809 + Conv_Signed = 810 + Conv_Unsigned = 811 + Conv_Integer = 812 + Math_Real = 813 + Ceil = 814 + Log2 = 815 + Sin = 816 + Cos = 817 + Last_Ieee = 817 + First_Synthesis = 818 + Allconst = 818 + Allseq = 819 + Anyconst = 820 + Anyseq = 821 + Last_Synthesis = 821 + First_Directive = 822 + Define = 822 + Endif = 823 + Ifdef = 824 + Ifndef = 825 + Include = 826 + Timescale = 827 + Undef = 828 + Protect = 829 + Begin_Protected = 830 + End_Protected = 831 + Key_Block = 832 + Data_Block = 833 + Line = 834 + Celldefine = 835 + Endcelldefine = 836 + Default_Nettype = 837 + Resetall = 838 + Last_Directive = 838 + First_Systask = 839 + Bits = 839 + D_Root = 840 + D_Unit = 841 + Last_Systask = 841 + First_SV_Method = 842 + Size = 842 + Insert = 843 + Delete = 844 + Pop_Front = 845 + Pop_Back = 846 + Push_Front = 847 + Push_Back = 848 + Name = 849 + Len = 850 + Substr = 851 + Exists = 852 + Atoi = 853 + Itoa = 854 + Find = 855 + Find_Index = 856 + Find_First = 857 + Find_First_Index = 858 + Find_Last = 859 + Find_Last_Index = 860 + Num = 861 + Randomize = 862 + Pre_Randomize = 863 + Post_Randomize = 864 + Srandom = 865 + Get_Randstate = 866 + Set_Randstate = 867 + Seed = 868 + State = 869 + Last_SV_Method = 869 + First_BSV = 870 + uAction = 870 + uActionValue = 871 + BVI = 872 + uC = 873 + uCF = 874 + uE = 875 + uSB = 876 + uSBR = 877 + Action = 878 + Endaction = 879 + Actionvalue = 880 + Endactionvalue = 881 + Ancestor = 882 + Clocked_By = 883 + Default_Clock = 884 + Default_Reset = 885 + Dependencies = 886 + Deriving = 887 + Determines = 888 + Enable = 889 + Ifc_Inout = 890 + Input_Clock = 891 + Input_Reset = 892 + Instance = 893 + Endinstance = 894 + Let = 895 + Match = 896 + Method = 897 + Endmethod = 898 + Numeric = 899 + Output_Clock = 900 + Output_Reset = 901 + Par = 902 + Endpar = 903 + Path = 904 + Provisos = 905 + Ready = 906 + Reset_By = 907 + Rule = 908 + Endrule = 909 + Rules = 910 + Endrules = 911 + Same_Family = 912 + Schedule = 913 + Seq = 914 + Endseq = 915 + Typeclass = 916 + Endtypeclass = 917 + Valueof = 918 + uValueof = 919 + Last_BSV = 919 + First_Comment = 920 + Psl = 920 + Pragma = 921 + Synthesis = 922 + Synopsys = 923 + Translate_Off = 924 + Translate_On = 925 + Last_Comment = 925 + First_PSL = 926 + A = 926 + Af = 927 + Ag = 928 + Ax = 929 + Abort = 930 + Assume_Guarantee = 931 + Before = 932 + Clock = 933 + E = 934 + Ef = 935 + Eg = 936 + Ex = 937 + Endpoint = 938 + Eventually = 939 + Fairness = 940 + Fell = 941 + Forall = 942 + G = 943 + Inf = 944 + Inherit = 945 + Never = 946 + Next_A = 947 + Next_E = 948 + Next_Event = 949 + Next_Event_A = 950 + Next_Event_E = 951 + Prev = 952 + Rose = 953 + Strong = 954 + W = 955 + Whilenot = 956 + Within = 957 + X = 958 + Last_PSL = 958 + First_Edif = 959 + Celltype = 969 + View = 970 + Viewtype = 971 + Direction = 972 + Contents = 973 + Net = 974 + Viewref = 975 + Cellref = 976 + Libraryref = 977 + Portinstance = 978 + Joined = 979 + Portref = 980 + Instanceref = 981 + Design = 982 + Designator = 983 + Owner = 984 + Member = 985 + Number = 986 + Rename = 987 + Userdata = 988 + Last_Edif = 988 diff --git a/python/libghdl/thin/vhdl/nodes.py b/python/libghdl/thin/vhdl/nodes.py index 15b1d9074..e5c1a431b 100644 --- a/python/libghdl/thin/vhdl/nodes.py +++ b/python/libghdl/thin/vhdl/nodes.py @@ -1066,165 +1066,167 @@ class Iir_Predefined: Ieee_1164_Vector_Xnor = 187 Ieee_1164_Vector_Not = 188 Ieee_1164_To_Bitvector = 189 - Ieee_1164_Rising_Edge = 190 - Ieee_1164_Falling_Edge = 191 - Ieee_1164_Vector_And_Reduce = 192 - Ieee_1164_Vector_Or_Reduce = 193 - Ieee_1164_Condition_Operator = 194 - Ieee_Numeric_Std_Toint_Uns_Nat = 195 - Ieee_Numeric_Std_Toint_Sgn_Int = 196 - Ieee_Numeric_Std_Touns_Nat_Nat_Uns = 197 - Ieee_Numeric_Std_Touns_Nat_Uns_Uns = 198 - Ieee_Numeric_Std_Tosgn_Int_Nat_Sgn = 199 - Ieee_Numeric_Std_Tosgn_Int_Sgn_Sgn = 200 - Ieee_Numeric_Std_Resize_Uns_Nat = 201 - Ieee_Numeric_Std_Resize_Sgn_Nat = 202 - Ieee_Numeric_Std_Resize_Uns_Uns = 203 - Ieee_Numeric_Std_Resize_Sgn_Sgn = 204 - Ieee_Numeric_Std_Add_Uns_Uns = 205 - Ieee_Numeric_Std_Add_Uns_Nat = 206 - Ieee_Numeric_Std_Add_Nat_Uns = 207 - Ieee_Numeric_Std_Add_Uns_Log = 208 - Ieee_Numeric_Std_Add_Log_Uns = 209 - Ieee_Numeric_Std_Add_Sgn_Sgn = 210 - Ieee_Numeric_Std_Add_Sgn_Int = 211 - Ieee_Numeric_Std_Add_Int_Sgn = 212 - Ieee_Numeric_Std_Add_Sgn_Log = 213 - Ieee_Numeric_Std_Add_Log_Sgn = 214 - Ieee_Numeric_Std_Sub_Uns_Uns = 215 - Ieee_Numeric_Std_Sub_Uns_Nat = 216 - Ieee_Numeric_Std_Sub_Nat_Uns = 217 - Ieee_Numeric_Std_Sub_Sgn_Sgn = 218 - Ieee_Numeric_Std_Sub_Sgn_Int = 219 - Ieee_Numeric_Std_Sub_Int_Sgn = 220 - Ieee_Numeric_Std_Mul_Uns_Uns = 221 - Ieee_Numeric_Std_Mul_Uns_Nat = 222 - Ieee_Numeric_Std_Mul_Nat_Uns = 223 - Ieee_Numeric_Std_Mul_Sgn_Sgn = 224 - Ieee_Numeric_Std_Mul_Sgn_Int = 225 - Ieee_Numeric_Std_Mul_Int_Sgn = 226 - Ieee_Numeric_Std_Div_Uns_Uns = 227 - Ieee_Numeric_Std_Div_Uns_Nat = 228 - Ieee_Numeric_Std_Div_Nat_Uns = 229 - Ieee_Numeric_Std_Div_Sgn_Sgn = 230 - Ieee_Numeric_Std_Div_Sgn_Int = 231 - Ieee_Numeric_Std_Div_Int_Sgn = 232 - Ieee_Numeric_Std_Gt_Uns_Uns = 233 - Ieee_Numeric_Std_Gt_Uns_Nat = 234 - Ieee_Numeric_Std_Gt_Nat_Uns = 235 - Ieee_Numeric_Std_Gt_Sgn_Sgn = 236 - Ieee_Numeric_Std_Gt_Sgn_Int = 237 - Ieee_Numeric_Std_Gt_Int_Sgn = 238 - Ieee_Numeric_Std_Lt_Uns_Uns = 239 - Ieee_Numeric_Std_Lt_Uns_Nat = 240 - Ieee_Numeric_Std_Lt_Nat_Uns = 241 - Ieee_Numeric_Std_Lt_Sgn_Sgn = 242 - Ieee_Numeric_Std_Lt_Sgn_Int = 243 - Ieee_Numeric_Std_Lt_Int_Sgn = 244 - Ieee_Numeric_Std_Le_Uns_Uns = 245 - Ieee_Numeric_Std_Le_Uns_Nat = 246 - Ieee_Numeric_Std_Le_Nat_Uns = 247 - Ieee_Numeric_Std_Le_Sgn_Sgn = 248 - Ieee_Numeric_Std_Le_Sgn_Int = 249 - Ieee_Numeric_Std_Le_Int_Sgn = 250 - Ieee_Numeric_Std_Ge_Uns_Uns = 251 - Ieee_Numeric_Std_Ge_Uns_Nat = 252 - Ieee_Numeric_Std_Ge_Nat_Uns = 253 - Ieee_Numeric_Std_Ge_Sgn_Sgn = 254 - Ieee_Numeric_Std_Ge_Sgn_Int = 255 - Ieee_Numeric_Std_Ge_Int_Sgn = 256 - Ieee_Numeric_Std_Eq_Uns_Uns = 257 - Ieee_Numeric_Std_Eq_Uns_Nat = 258 - Ieee_Numeric_Std_Eq_Nat_Uns = 259 - Ieee_Numeric_Std_Eq_Sgn_Sgn = 260 - Ieee_Numeric_Std_Eq_Sgn_Int = 261 - Ieee_Numeric_Std_Eq_Int_Sgn = 262 - Ieee_Numeric_Std_Ne_Uns_Uns = 263 - Ieee_Numeric_Std_Ne_Uns_Nat = 264 - Ieee_Numeric_Std_Ne_Nat_Uns = 265 - Ieee_Numeric_Std_Ne_Sgn_Sgn = 266 - Ieee_Numeric_Std_Ne_Sgn_Int = 267 - Ieee_Numeric_Std_Ne_Int_Sgn = 268 - Ieee_Numeric_Std_Shl_Uns_Nat = 269 - Ieee_Numeric_Std_Shr_Uns_Nat = 270 - Ieee_Numeric_Std_Shl_Sgn_Nat = 271 - Ieee_Numeric_Std_Shr_Sgn_Nat = 272 - Ieee_Numeric_Std_Rol_Uns_Nat = 273 - Ieee_Numeric_Std_Ror_Uns_Nat = 274 - Ieee_Numeric_Std_Rol_Sgn_Nat = 275 - Ieee_Numeric_Std_Ror_Sgn_Nat = 276 - Ieee_Numeric_Std_Not_Uns = 277 - Ieee_Numeric_Std_Not_Sgn = 278 - Ieee_Numeric_Std_And_Uns_Uns = 279 - Ieee_Numeric_Std_And_Sgn_Sgn = 280 - Ieee_Numeric_Std_Or_Uns_Uns = 281 - Ieee_Numeric_Std_Or_Sgn_Sgn = 282 - Ieee_Numeric_Std_Nand_Uns_Uns = 283 - Ieee_Numeric_Std_Nand_Sgn_Sgn = 284 - Ieee_Numeric_Std_Nor_Uns_Uns = 285 - Ieee_Numeric_Std_Nor_Sgn_Sgn = 286 - Ieee_Numeric_Std_Xor_Uns_Uns = 287 - Ieee_Numeric_Std_Xor_Sgn_Sgn = 288 - Ieee_Numeric_Std_Xnor_Uns_Uns = 289 - Ieee_Numeric_Std_Xnor_Sgn_Sgn = 290 - Ieee_Numeric_Std_Neg_Uns = 291 - Ieee_Numeric_Std_Neg_Sgn = 292 - Ieee_Numeric_Std_Match_Log = 293 - Ieee_Numeric_Std_Match_Uns = 294 - Ieee_Numeric_Std_Match_Sgn = 295 - Ieee_Numeric_Std_Match_Slv = 296 - Ieee_Numeric_Std_Match_Suv = 297 - Ieee_Math_Real_Ceil = 298 - Ieee_Math_Real_Log2 = 299 - Ieee_Math_Real_Sin = 300 - Ieee_Math_Real_Cos = 301 - Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 302 - Ieee_Std_Logic_Unsigned_Add_Slv_Int = 303 - Ieee_Std_Logic_Unsigned_Add_Int_Slv = 304 - Ieee_Std_Logic_Unsigned_Add_Slv_Sl = 305 - Ieee_Std_Logic_Unsigned_Add_Sl_Slv = 306 - Ieee_Std_Logic_Unsigned_Sub_Slv_Slv = 307 - Ieee_Std_Logic_Unsigned_Sub_Slv_Int = 308 - Ieee_Std_Logic_Unsigned_Sub_Int_Slv = 309 - Ieee_Std_Logic_Unsigned_Sub_Slv_Sl = 310 - Ieee_Std_Logic_Unsigned_Sub_Sl_Slv = 311 - Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 312 - Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 313 - Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 314 - Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 315 - Ieee_Std_Logic_Unsigned_Le_Slv_Int = 316 - Ieee_Std_Logic_Unsigned_Le_Int_Slv = 317 - Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 318 - Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 319 - Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 320 - Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 321 - Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 322 - Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 323 - Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 324 - Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 325 - Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 326 - Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 327 - Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 328 - Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 329 - Ieee_Std_Logic_Unsigned_Conv_Integer = 330 - Ieee_Std_Logic_Signed_Add_Slv_Slv = 331 - Ieee_Std_Logic_Signed_Add_Slv_Int = 332 - Ieee_Std_Logic_Signed_Add_Int_Slv = 333 - Ieee_Std_Logic_Signed_Add_Slv_Sl = 334 - Ieee_Std_Logic_Signed_Add_Sl_Slv = 335 - Ieee_Std_Logic_Signed_Sub_Slv_Slv = 336 - Ieee_Std_Logic_Signed_Sub_Slv_Int = 337 - Ieee_Std_Logic_Signed_Sub_Int_Slv = 338 - Ieee_Std_Logic_Signed_Sub_Slv_Sl = 339 - Ieee_Std_Logic_Signed_Sub_Sl_Slv = 340 - Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 341 - Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 342 - Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 343 - Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 344 - Ieee_Std_Logic_Arith_Conv_Integer_Int = 345 - Ieee_Std_Logic_Arith_Conv_Integer_Uns = 346 - Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 347 - Ieee_Std_Logic_Arith_Conv_Integer_Log = 348 + Ieee_1164_Vector_Is_X = 190 + Ieee_1164_Scalar_Is_X = 191 + Ieee_1164_Rising_Edge = 192 + Ieee_1164_Falling_Edge = 193 + Ieee_1164_Vector_And_Reduce = 194 + Ieee_1164_Vector_Or_Reduce = 195 + Ieee_1164_Condition_Operator = 196 + Ieee_Numeric_Std_Toint_Uns_Nat = 197 + Ieee_Numeric_Std_Toint_Sgn_Int = 198 + Ieee_Numeric_Std_Touns_Nat_Nat_Uns = 199 + Ieee_Numeric_Std_Touns_Nat_Uns_Uns = 200 + Ieee_Numeric_Std_Tosgn_Int_Nat_Sgn = 201 + Ieee_Numeric_Std_Tosgn_Int_Sgn_Sgn = 202 + Ieee_Numeric_Std_Resize_Uns_Nat = 203 + Ieee_Numeric_Std_Resize_Sgn_Nat = 204 + Ieee_Numeric_Std_Resize_Uns_Uns = 205 + Ieee_Numeric_Std_Resize_Sgn_Sgn = 206 + Ieee_Numeric_Std_Add_Uns_Uns = 207 + Ieee_Numeric_Std_Add_Uns_Nat = 208 + Ieee_Numeric_Std_Add_Nat_Uns = 209 + Ieee_Numeric_Std_Add_Uns_Log = 210 + Ieee_Numeric_Std_Add_Log_Uns = 211 + Ieee_Numeric_Std_Add_Sgn_Sgn = 212 + Ieee_Numeric_Std_Add_Sgn_Int = 213 + Ieee_Numeric_Std_Add_Int_Sgn = 214 + Ieee_Numeric_Std_Add_Sgn_Log = 215 + Ieee_Numeric_Std_Add_Log_Sgn = 216 + Ieee_Numeric_Std_Sub_Uns_Uns = 217 + Ieee_Numeric_Std_Sub_Uns_Nat = 218 + Ieee_Numeric_Std_Sub_Nat_Uns = 219 + Ieee_Numeric_Std_Sub_Sgn_Sgn = 220 + Ieee_Numeric_Std_Sub_Sgn_Int = 221 + Ieee_Numeric_Std_Sub_Int_Sgn = 222 + Ieee_Numeric_Std_Mul_Uns_Uns = 223 + Ieee_Numeric_Std_Mul_Uns_Nat = 224 + Ieee_Numeric_Std_Mul_Nat_Uns = 225 + Ieee_Numeric_Std_Mul_Sgn_Sgn = 226 + Ieee_Numeric_Std_Mul_Sgn_Int = 227 + Ieee_Numeric_Std_Mul_Int_Sgn = 228 + Ieee_Numeric_Std_Div_Uns_Uns = 229 + Ieee_Numeric_Std_Div_Uns_Nat = 230 + Ieee_Numeric_Std_Div_Nat_Uns = 231 + Ieee_Numeric_Std_Div_Sgn_Sgn = 232 + Ieee_Numeric_Std_Div_Sgn_Int = 233 + Ieee_Numeric_Std_Div_Int_Sgn = 234 + Ieee_Numeric_Std_Gt_Uns_Uns = 235 + Ieee_Numeric_Std_Gt_Uns_Nat = 236 + Ieee_Numeric_Std_Gt_Nat_Uns = 237 + Ieee_Numeric_Std_Gt_Sgn_Sgn = 238 + Ieee_Numeric_Std_Gt_Sgn_Int = 239 + Ieee_Numeric_Std_Gt_Int_Sgn = 240 + Ieee_Numeric_Std_Lt_Uns_Uns = 241 + Ieee_Numeric_Std_Lt_Uns_Nat = 242 + Ieee_Numeric_Std_Lt_Nat_Uns = 243 + Ieee_Numeric_Std_Lt_Sgn_Sgn = 244 + Ieee_Numeric_Std_Lt_Sgn_Int = 245 + Ieee_Numeric_Std_Lt_Int_Sgn = 246 + Ieee_Numeric_Std_Le_Uns_Uns = 247 + Ieee_Numeric_Std_Le_Uns_Nat = 248 + Ieee_Numeric_Std_Le_Nat_Uns = 249 + Ieee_Numeric_Std_Le_Sgn_Sgn = 250 + Ieee_Numeric_Std_Le_Sgn_Int = 251 + Ieee_Numeric_Std_Le_Int_Sgn = 252 + Ieee_Numeric_Std_Ge_Uns_Uns = 253 + Ieee_Numeric_Std_Ge_Uns_Nat = 254 + Ieee_Numeric_Std_Ge_Nat_Uns = 255 + Ieee_Numeric_Std_Ge_Sgn_Sgn = 256 + Ieee_Numeric_Std_Ge_Sgn_Int = 257 + Ieee_Numeric_Std_Ge_Int_Sgn = 258 + Ieee_Numeric_Std_Eq_Uns_Uns = 259 + Ieee_Numeric_Std_Eq_Uns_Nat = 260 + Ieee_Numeric_Std_Eq_Nat_Uns = 261 + Ieee_Numeric_Std_Eq_Sgn_Sgn = 262 + Ieee_Numeric_Std_Eq_Sgn_Int = 263 + Ieee_Numeric_Std_Eq_Int_Sgn = 264 + Ieee_Numeric_Std_Ne_Uns_Uns = 265 + Ieee_Numeric_Std_Ne_Uns_Nat = 266 + Ieee_Numeric_Std_Ne_Nat_Uns = 267 + Ieee_Numeric_Std_Ne_Sgn_Sgn = 268 + Ieee_Numeric_Std_Ne_Sgn_Int = 269 + Ieee_Numeric_Std_Ne_Int_Sgn = 270 + Ieee_Numeric_Std_Shl_Uns_Nat = 271 + Ieee_Numeric_Std_Shr_Uns_Nat = 272 + Ieee_Numeric_Std_Shl_Sgn_Nat = 273 + Ieee_Numeric_Std_Shr_Sgn_Nat = 274 + Ieee_Numeric_Std_Rol_Uns_Nat = 275 + Ieee_Numeric_Std_Ror_Uns_Nat = 276 + Ieee_Numeric_Std_Rol_Sgn_Nat = 277 + Ieee_Numeric_Std_Ror_Sgn_Nat = 278 + Ieee_Numeric_Std_Not_Uns = 279 + Ieee_Numeric_Std_Not_Sgn = 280 + Ieee_Numeric_Std_And_Uns_Uns = 281 + Ieee_Numeric_Std_And_Sgn_Sgn = 282 + Ieee_Numeric_Std_Or_Uns_Uns = 283 + Ieee_Numeric_Std_Or_Sgn_Sgn = 284 + Ieee_Numeric_Std_Nand_Uns_Uns = 285 + Ieee_Numeric_Std_Nand_Sgn_Sgn = 286 + Ieee_Numeric_Std_Nor_Uns_Uns = 287 + Ieee_Numeric_Std_Nor_Sgn_Sgn = 288 + Ieee_Numeric_Std_Xor_Uns_Uns = 289 + Ieee_Numeric_Std_Xor_Sgn_Sgn = 290 + Ieee_Numeric_Std_Xnor_Uns_Uns = 291 + Ieee_Numeric_Std_Xnor_Sgn_Sgn = 292 + Ieee_Numeric_Std_Neg_Uns = 293 + Ieee_Numeric_Std_Neg_Sgn = 294 + Ieee_Numeric_Std_Match_Log = 295 + Ieee_Numeric_Std_Match_Uns = 296 + Ieee_Numeric_Std_Match_Sgn = 297 + Ieee_Numeric_Std_Match_Slv = 298 + Ieee_Numeric_Std_Match_Suv = 299 + Ieee_Math_Real_Ceil = 300 + Ieee_Math_Real_Log2 = 301 + Ieee_Math_Real_Sin = 302 + Ieee_Math_Real_Cos = 303 + Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 304 + Ieee_Std_Logic_Unsigned_Add_Slv_Int = 305 + Ieee_Std_Logic_Unsigned_Add_Int_Slv = 306 + Ieee_Std_Logic_Unsigned_Add_Slv_Sl = 307 + Ieee_Std_Logic_Unsigned_Add_Sl_Slv = 308 + Ieee_Std_Logic_Unsigned_Sub_Slv_Slv = 309 + Ieee_Std_Logic_Unsigned_Sub_Slv_Int = 310 + Ieee_Std_Logic_Unsigned_Sub_Int_Slv = 311 + Ieee_Std_Logic_Unsigned_Sub_Slv_Sl = 312 + Ieee_Std_Logic_Unsigned_Sub_Sl_Slv = 313 + Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 314 + Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 315 + Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 316 + Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 317 + Ieee_Std_Logic_Unsigned_Le_Slv_Int = 318 + Ieee_Std_Logic_Unsigned_Le_Int_Slv = 319 + Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 320 + Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 321 + Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 322 + Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 323 + Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 324 + Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 325 + Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 326 + Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 327 + Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 328 + Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 329 + Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 330 + Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 331 + Ieee_Std_Logic_Unsigned_Conv_Integer = 332 + Ieee_Std_Logic_Signed_Add_Slv_Slv = 333 + Ieee_Std_Logic_Signed_Add_Slv_Int = 334 + Ieee_Std_Logic_Signed_Add_Int_Slv = 335 + Ieee_Std_Logic_Signed_Add_Slv_Sl = 336 + Ieee_Std_Logic_Signed_Add_Sl_Slv = 337 + Ieee_Std_Logic_Signed_Sub_Slv_Slv = 338 + Ieee_Std_Logic_Signed_Sub_Slv_Int = 339 + Ieee_Std_Logic_Signed_Sub_Int_Slv = 340 + Ieee_Std_Logic_Signed_Sub_Slv_Sl = 341 + Ieee_Std_Logic_Signed_Sub_Sl_Slv = 342 + Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 343 + Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 344 + Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 345 + Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 346 + Ieee_Std_Logic_Arith_Conv_Integer_Int = 347 + Ieee_Std_Logic_Arith_Conv_Integer_Uns = 348 + Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 349 + Ieee_Std_Logic_Arith_Conv_Integer_Log = 350 Get_Kind = libghdl.vhdl__nodes__get_kind Get_Location = libghdl.vhdl__nodes__get_location diff --git a/src/std_names.adb b/src/std_names.adb index 5612363d4..7f6e20242 100644 --- a/src/std_names.adb +++ b/src/std_names.adb @@ -644,6 +644,7 @@ package body Std_Names is Def ("rotate_left", Name_Rotate_Left); Def ("rotate_right", Name_Rotate_Right); Def ("to_bitvector", Name_To_Bitvector); + Def ("is_x", Name_Is_X); Def ("conv_signed", Name_Conv_Signed); Def ("conv_unsigned", Name_Conv_Unsigned); Def ("conv_integer", Name_Conv_Integer); diff --git a/src/std_names.ads b/src/std_names.ads index 57901576b..544f7ed7b 100644 --- a/src/std_names.ads +++ b/src/std_names.ads @@ -725,14 +725,15 @@ package Std_Names is Name_Rotate_Left : constant Name_Id := Name_First_Ieee + 026; Name_Rotate_Right : constant Name_Id := Name_First_Ieee + 027; Name_To_Bitvector : constant Name_Id := Name_First_Ieee + 028; - Name_Conv_Signed : constant Name_Id := Name_First_Ieee + 029; - Name_Conv_Unsigned : constant Name_Id := Name_First_Ieee + 030; - Name_Conv_Integer : constant Name_Id := Name_First_Ieee + 031; - Name_Math_Real : constant Name_Id := Name_First_Ieee + 032; - Name_Ceil : constant Name_Id := Name_First_Ieee + 033; - Name_Log2 : constant Name_Id := Name_First_Ieee + 034; - Name_Sin : constant Name_Id := Name_First_Ieee + 035; - Name_Cos : constant Name_Id := Name_First_Ieee + 036; + Name_Is_X : constant Name_Id := Name_First_Ieee + 029; + Name_Conv_Signed : constant Name_Id := Name_First_Ieee + 030; + Name_Conv_Unsigned : constant Name_Id := Name_First_Ieee + 031; + Name_Conv_Integer : constant Name_Id := Name_First_Ieee + 032; + Name_Math_Real : constant Name_Id := Name_First_Ieee + 033; + Name_Ceil : constant Name_Id := Name_First_Ieee + 034; + Name_Log2 : constant Name_Id := Name_First_Ieee + 035; + Name_Sin : constant Name_Id := Name_First_Ieee + 036; + Name_Cos : constant Name_Id := Name_First_Ieee + 037; Name_Last_Ieee : constant Name_Id := Name_Cos; Name_First_Synthesis : constant Name_Id := Name_Last_Ieee + 1; diff --git a/src/vhdl/vhdl-ieee-std_logic_1164.adb b/src/vhdl/vhdl-ieee-std_logic_1164.adb index 431b5bf6a..9c123d16a 100644 --- a/src/vhdl/vhdl-ieee-std_logic_1164.adb +++ b/src/vhdl/vhdl-ieee-std_logic_1164.adb @@ -271,6 +271,9 @@ package body Vhdl.Ieee.Std_Logic_1164 is when Name_Op_Condition => Predefined := Iir_Predefined_Ieee_1164_Condition_Operator; + when Name_Is_X => + Predefined := + Iir_Predefined_Ieee_1164_Scalar_Is_X; when others => Predefined := Iir_Predefined_None; end case; @@ -301,6 +304,9 @@ package body Vhdl.Ieee.Std_Logic_1164 is when Name_Or => Predefined := Iir_Predefined_Ieee_1164_Vector_Or_Reduce; + when Name_Is_X => + Predefined := + Iir_Predefined_Ieee_1164_Scalar_Is_X; when others => Predefined := Iir_Predefined_None; end case; diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 1f65efb0f..688c30555 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -4920,6 +4920,9 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_1164_To_Bitvector, + Iir_Predefined_Ieee_1164_Vector_Is_X, + Iir_Predefined_Ieee_1164_Scalar_Is_X, + Iir_Predefined_Ieee_1164_Rising_Edge, Iir_Predefined_Ieee_1164_Falling_Edge, -- cgit v1.2.3