From 6185c8d2de85828d53135433019968aa54699947 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Mon, 19 Dec 2022 18:32:18 +0100
Subject: testsuite/gna: add a test for #2276

---
 testsuite/gna/issue2276/mwe.vhdl     | 16 ++++++++++++++++
 testsuite/gna/issue2276/testsuite.sh | 11 +++++++++++
 2 files changed, 27 insertions(+)
 create mode 100644 testsuite/gna/issue2276/mwe.vhdl
 create mode 100755 testsuite/gna/issue2276/testsuite.sh

diff --git a/testsuite/gna/issue2276/mwe.vhdl b/testsuite/gna/issue2276/mwe.vhdl
new file mode 100644
index 000000000..28b06009e
--- /dev/null
+++ b/testsuite/gna/issue2276/mwe.vhdl
@@ -0,0 +1,16 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity mwe is
+end entity;
+
+architecture tb of mwe is
+
+  constant ic_slv : std_logic_vector(63 downto 0) := x"7000000000000228";
+  signal ic_bv : bit_vector(ic_slv'range);
+
+begin
+
+  ic_bv <= to_bitvector(ic_slv);
+
+end architecture;
diff --git a/testsuite/gna/issue2276/testsuite.sh b/testsuite/gna/issue2276/testsuite.sh
new file mode 100755
index 000000000..4ade39fc0
--- /dev/null
+++ b/testsuite/gna/issue2276/testsuite.sh
@@ -0,0 +1,11 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze mwe.vhdl
+elab_simulate mwe
+
+clean
+
+echo "Test successful"
-- 
cgit v1.2.3