From 5ea993bae3c78ee8bdda3942be80fa38091f4591 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Mon, 20 Jan 2020 06:57:44 +0100
Subject: testsuite/synth: add testcase from tgingold/ghdlsynth-beta#80

---
 testsuite/synth/synth80/testcase.vhdl | 16 ++++++++++++++++
 testsuite/synth/synth80/testsuite.sh  |  8 ++++++++
 2 files changed, 24 insertions(+)
 create mode 100644 testsuite/synth/synth80/testcase.vhdl
 create mode 100755 testsuite/synth/synth80/testsuite.sh

diff --git a/testsuite/synth/synth80/testcase.vhdl b/testsuite/synth/synth80/testcase.vhdl
new file mode 100644
index 000000000..49c25340d
--- /dev/null
+++ b/testsuite/synth/synth80/testcase.vhdl
@@ -0,0 +1,16 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity testcase is
+    generic (
+        init_bit : std_logic := '1'
+    );
+end testcase;
+
+architecture rtl of testcase is
+    -- assigning generic to std_logic works OK
+    signal test_assign : std_logic := init_bit; 
+    -- assigning generic to part of std_logic_vector breaks ghdlsynth
+    signal test_assign_vector : std_logic_vector(1 downto 0) := init_bit & "0";
+begin
+end rtl;
diff --git a/testsuite/synth/synth80/testsuite.sh b/testsuite/synth/synth80/testsuite.sh
new file mode 100755
index 000000000..6d097693c
--- /dev/null
+++ b/testsuite/synth/synth80/testsuite.sh
@@ -0,0 +1,8 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+synth testcase.vhdl -e > syn_testcase.vhdl
+clean
+
+echo "Test successful"
-- 
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