From 5dbdac34315ff4be500394903788c430ff9988a5 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Sat, 27 Aug 2016 11:11:02 +0200 Subject: Add testcase for previous patch --- testsuite/gna/bug050/tarith.vhdl | 5 +++++ testsuite/gna/bug050/testsuite.sh | 22 ++++++++++++++++++++++ testsuite/gna/bug050/tsigned.vhdl | 5 +++++ testsuite/gna/bug050/tsltextio.vhdl | 5 +++++ testsuite/gna/bug050/tunsigned.vhdl | 5 +++++ 5 files changed, 42 insertions(+) create mode 100644 testsuite/gna/bug050/tarith.vhdl create mode 100755 testsuite/gna/bug050/testsuite.sh create mode 100644 testsuite/gna/bug050/tsigned.vhdl create mode 100644 testsuite/gna/bug050/tsltextio.vhdl create mode 100644 testsuite/gna/bug050/tunsigned.vhdl diff --git a/testsuite/gna/bug050/tarith.vhdl b/testsuite/gna/bug050/tarith.vhdl new file mode 100644 index 000000000..3fad833c4 --- /dev/null +++ b/testsuite/gna/bug050/tarith.vhdl @@ -0,0 +1,5 @@ +library ieee; +use ieee.std_logic_arith.all; + +entity tb is +end tb; diff --git a/testsuite/gna/bug050/testsuite.sh b/testsuite/gna/bug050/testsuite.sh new file mode 100755 index 000000000..a171a3051 --- /dev/null +++ b/testsuite/gna/bug050/testsuite.sh @@ -0,0 +1,22 @@ +#! /bin/sh + +. ../../testenv.sh + +analyze_failure tarith.vhdl +analyze --ieee=synopsys tarith.vhdl + +analyze_failure tunsigned.vhdl +analyze --ieee=synopsys tunsigned.vhdl + +analyze_failure tsigned.vhdl +analyze --ieee=synopsys tsigned.vhdl + +analyze_failure tsltextio.vhdl +analyze --ieee=synopsys tsltextio.vhdl +analyze --std=08 tsltextio.vhdl + +clean + +clean --std=08 + +echo "Test successful" diff --git a/testsuite/gna/bug050/tsigned.vhdl b/testsuite/gna/bug050/tsigned.vhdl new file mode 100644 index 000000000..481678614 --- /dev/null +++ b/testsuite/gna/bug050/tsigned.vhdl @@ -0,0 +1,5 @@ +library ieee; +use ieee.std_logic_signed; + +entity tb is +end tb; diff --git a/testsuite/gna/bug050/tsltextio.vhdl b/testsuite/gna/bug050/tsltextio.vhdl new file mode 100644 index 000000000..892fc5791 --- /dev/null +++ b/testsuite/gna/bug050/tsltextio.vhdl @@ -0,0 +1,5 @@ +library ieee; +use ieee.std_logic_textio; + +entity tb is +end tb; diff --git a/testsuite/gna/bug050/tunsigned.vhdl b/testsuite/gna/bug050/tunsigned.vhdl new file mode 100644 index 000000000..266f7841a --- /dev/null +++ b/testsuite/gna/bug050/tunsigned.vhdl @@ -0,0 +1,5 @@ +library ieee; +use ieee.std_logic_unsigned; + +entity tb is +end tb; -- cgit v1.2.3