From 5a73edcb5c4e113c0037ef8759c4e3ab9665ee22 Mon Sep 17 00:00:00 2001
From: Stefan Biereigel <stefan@biereigel.de>
Date: Tue, 12 Mar 2019 21:37:50 +0100
Subject: fix gnat8 errors for libghdlsynth targets

---
 src/synth/synth-stmts.adb                   | 1 -
 src/vhdl/simulate/simul-execution.adb       | 1 -
 src/vhdl/simulate/simul-simulation-main.adb | 2 --
 3 files changed, 4 deletions(-)

diff --git a/src/synth/synth-stmts.adb b/src/synth/synth-stmts.adb
index c074b1aa4..3d8ee03f6 100644
--- a/src/synth/synth-stmts.adb
+++ b/src/synth/synth-stmts.adb
@@ -677,7 +677,6 @@ package body Synth.Stmts is
       Inter_Chain : Iir;
       Assoc_Chain : Iir)
    is
-      use Simul.Annotations;
       Inter : Iir;
       Assoc : Iir;
       Assoc_Inter : Iir;
diff --git a/src/vhdl/simulate/simul-execution.adb b/src/vhdl/simulate/simul-execution.adb
index b96e1f173..f034bb9b6 100644
--- a/src/vhdl/simulate/simul-execution.adb
+++ b/src/vhdl/simulate/simul-execution.adb
@@ -584,7 +584,6 @@ package body Simul.Execution is
 
    procedure Assert_Std_Ulogic_Dc (Loc : Iir)
    is
-      use Grt.Std_Logic_1164;
    begin
       Execute_Failed_Assertion
         ("assertion",
diff --git a/src/vhdl/simulate/simul-simulation-main.adb b/src/vhdl/simulate/simul-simulation-main.adb
index 3c6903953..7d6f0e7c7 100644
--- a/src/vhdl/simulate/simul-simulation-main.adb
+++ b/src/vhdl/simulate/simul-simulation-main.adb
@@ -34,7 +34,6 @@ with Grt.Main;
 with Simul.Debugger; use Simul.Debugger;
 with Simul.Debugger.AMS;
 with Grt.Errors;
-with Grt.Rtis;
 with Grt.Processes;
 with Grt.Signals;
 with Areapools; use Areapools;
@@ -1033,7 +1032,6 @@ package body Simul.Simulation.Main is
                                  Sig : Iir_Value_Literal_Acc;
                                  Val : Iir_Value_Literal_Acc)
    is
-      use Grt.Rtis;
       use Grt.Signals;
 
       procedure Create_Signal (Val : Iir_Value_Literal_Acc;
-- 
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