From 4ebca1802bc4e81d6c4bfe0b734a9f5828dacb1f Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Mon, 6 Apr 2020 18:19:56 +0200 Subject: testsuite/synth: add a test for #1193 --- testsuite/synth/issue1193/counters_7.vhdl | 24 ++++++++++++++++++++++++ testsuite/synth/issue1193/testsuite.sh | 10 ++++++++++ 2 files changed, 34 insertions(+) create mode 100644 testsuite/synth/issue1193/counters_7.vhdl create mode 100755 testsuite/synth/issue1193/testsuite.sh diff --git a/testsuite/synth/issue1193/counters_7.vhdl b/testsuite/synth/issue1193/counters_7.vhdl new file mode 100644 index 000000000..dc231e19b --- /dev/null +++ b/testsuite/synth/issue1193/counters_7.vhdl @@ -0,0 +1,24 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_signed.all; + +entity counters_7 is + port(C, CLR : in std_logic; + Q : out std_logic_vector(3 downto 0)); +end counters_7; + +architecture archi of counters_7 is + signal tmp: std_logic_vector(3 downto 0); +begin + process (C, CLR) + begin + if (CLR='1') then + tmp <= "0000"; + elsif (C'event and C='1') then + tmp <= tmp + 1; + end if; + end process; + + Q <= tmp; + +end archi; diff --git a/testsuite/synth/issue1193/testsuite.sh b/testsuite/synth/issue1193/testsuite.sh new file mode 100755 index 000000000..ec08805ed --- /dev/null +++ b/testsuite/synth/issue1193/testsuite.sh @@ -0,0 +1,10 @@ +#! /bin/sh + +. ../../testenv.sh + +GHDL_STD_FLAGS=-fsynopsys +synth_analyze counters_7 + +clean + +echo "Test successful" -- cgit v1.2.3