From 4d62517b8c26d9f86ba4daf4ee6a77d84c07bf12 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Tue, 27 Feb 2018 06:59:52 +0100
Subject: Add testcase.

---
 testsuite/gna/bug086/sig.vhdl     | 28 ++++++++++++++++++++++++++++
 testsuite/gna/bug086/testsuite.sh | 10 ++++++++++
 2 files changed, 38 insertions(+)
 create mode 100644 testsuite/gna/bug086/sig.vhdl
 create mode 100755 testsuite/gna/bug086/testsuite.sh

diff --git a/testsuite/gna/bug086/sig.vhdl b/testsuite/gna/bug086/sig.vhdl
new file mode 100644
index 000000000..20d75216e
--- /dev/null
+++ b/testsuite/gna/bug086/sig.vhdl
@@ -0,0 +1,28 @@
+entity sig is
+end;
+
+architecture behav of sig is
+  signal s : natural;
+  signal last : time;
+begin
+
+  s <= 1 after 20 ns;
+
+  b: block
+    port (q : boolean);
+    port map (q => s'quiet(10 ns));
+  begin
+    process (q)
+    begin
+      report "q is " & boolean'image (q);
+      last <= now;
+    end process;
+  end block;
+
+  process
+  begin
+    wait for 100 ns;
+    assert last = 30 ns severity failure;
+    wait;
+  end process;
+end;
diff --git a/testsuite/gna/bug086/testsuite.sh b/testsuite/gna/bug086/testsuite.sh
new file mode 100755
index 000000000..c28dcd1d1
--- /dev/null
+++ b/testsuite/gna/bug086/testsuite.sh
@@ -0,0 +1,10 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+analyze sig.vhdl
+elab_simulate sig
+
+clean
+
+echo "Test successful"
-- 
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