From 391714eeecaaa43259a7b5ef56a2c910104978c0 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Sat, 5 Nov 2022 08:03:16 +0100 Subject: testsuite/synth: add a test for #2232 --- testsuite/synth/issue2232/sipo.vhdl | 25 +++++++++++++++++++++++++ testsuite/synth/issue2232/testsuite.sh | 12 ++++++++++++ 2 files changed, 37 insertions(+) create mode 100644 testsuite/synth/issue2232/sipo.vhdl create mode 100755 testsuite/synth/issue2232/testsuite.sh diff --git a/testsuite/synth/issue2232/sipo.vhdl b/testsuite/synth/issue2232/sipo.vhdl new file mode 100644 index 000000000..adeb32054 --- /dev/null +++ b/testsuite/synth/issue2232/sipo.vhdl @@ -0,0 +1,25 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +entity sipo is + port (clk : in std_logic; + in_data : in std_logic; + out_data : out std_logic_vector(1 downto 0)); +end entity; + +architecture rtl of sipo is + signal mem : std_logic_vector(1 downto 0); + signal ctr : unsigned(0 downto 0); +begin + process (clk) begin + if rising_edge(clk) then +-- This indirection doesn't synthesize correctly. + mem(to_integer(ctr)) <= in_data; + + ctr(0) <= not ctr(0); + end if; + end process; + + out_data <= mem; +end architecture rtl; diff --git a/testsuite/synth/issue2232/testsuite.sh b/testsuite/synth/issue2232/testsuite.sh new file mode 100755 index 000000000..516de7318 --- /dev/null +++ b/testsuite/synth/issue2232/testsuite.sh @@ -0,0 +1,12 @@ +#! /bin/sh + +. ../../testenv.sh + +synth_only sipo + +synth --out=raw sipo.vhdl -e > sipo.raw + +CNT=$(grep -c dff sipo.raw) +test $CNT -eq 2 + +echo "Test successful" -- cgit v1.2.3