From 27c2badb6d3d0f3e84b5bfe53770bd911679db42 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Fri, 16 Dec 2022 07:31:16 +0100 Subject: testsuite/gna: add a test for #2271 --- testsuite/gna/issue2271/ent.vhdl | 21 +++++++++++++++++++++ testsuite/gna/issue2271/testsuite.sh | 10 ++++++++++ 2 files changed, 31 insertions(+) create mode 100644 testsuite/gna/issue2271/ent.vhdl create mode 100755 testsuite/gna/issue2271/testsuite.sh diff --git a/testsuite/gna/issue2271/ent.vhdl b/testsuite/gna/issue2271/ent.vhdl new file mode 100644 index 000000000..1d5ea6ff1 --- /dev/null +++ b/testsuite/gna/issue2271/ent.vhdl @@ -0,0 +1,21 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity ent is +end entity; + +architecture behaviour of ent is + component comp is + port ( + d : in std_logic; + q : out std_logic + ); + end component; +begin + + comp : comp + port map ( + d => '0', + q => open + ); +end architecture; diff --git a/testsuite/gna/issue2271/testsuite.sh b/testsuite/gna/issue2271/testsuite.sh new file mode 100755 index 000000000..a679ec9c9 --- /dev/null +++ b/testsuite/gna/issue2271/testsuite.sh @@ -0,0 +1,10 @@ +#! /bin/sh + +. ../../testenv.sh + +if $GHDL -c ent.vhdl -e ent; then + echo "Error expected" + exit 1 +fi + +echo "Test successful" -- cgit v1.2.3