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* synth-stmts: reduce use of global context.Tristan Gingold2020-05-011-13/+8
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* synth-stmts: add use clause for netlists.gatesTristan Gingold2020-05-012-17/+12
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* synth: propagate enable condition to expressions. For #1273Tristan Gingold2020-05-0112-250/+364
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* netlists-folds: add Buil2_ImpTristan Gingold2020-05-012-4/+24
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* synth: also check default value of signals. For #1271Tristan Gingold2020-04-301-18/+26
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* synth: do not allow signals in default values. Fix #1271Tristan Gingold2020-04-301-4/+22
| | | | Only for default values of 'global' objects.
* psl: set locations in CSE. Fix #1272Tristan Gingold2020-04-292-14/+4
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* synth: improve handling of synchronous memory read.Tristan Gingold2020-04-281-6/+92
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* vhdl-sem_expr: fix crash on incorrect aggregate. Fix #1269Tristan Gingold2020-04-281-1/+2
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* vhdl: fix handling of types name in name attributes. Fix #1268Tristan Gingold2020-04-272-9/+23
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* vhdl: avoid crash on incorrect type mark in subtype indication.Tristan Gingold2020-04-273-10/+21
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* vhdl: minimal support of interface package in entities. For #1262Tristan Gingold2020-04-278-21/+47
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* synth-expr: fix handling of array attributes. Fix #1266Tristan Gingold2020-04-271-2/+19
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* netlists: ignore missing location on more const.Tristan Gingold2020-04-271-7/+10
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* synth-stmts: add a missing location. Fix #1267Tristan Gingold2020-04-271-1/+4
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* netlists-disp_vhdl: check presence location on significant instances.Tristan Gingold2020-04-261-0/+15
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* synth: add many calls to set_locationTristan Gingold2020-04-268-56/+134
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* psl: keep locations.Tristan Gingold2020-04-267-20/+52
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* synth-oper: handle more shifts for #1264Tristan Gingold2020-04-261-2/+4
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* synth: implement static sub_sgn_int. Fix #1265Tristan Gingold2020-04-263-0/+50
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* synth-static_oper: handle sll/srl for signed/unsigned. Fix #1264Tristan Gingold2020-04-261-1/+78
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* synth-oper: propagate error.Tristan Gingold2020-04-261-4/+8
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* netlists-memories: Handle gated dyn_extract.Tristan Gingold2020-04-262-30/+241
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* netlists: add a very simple dot dump.Tristan Gingold2020-04-254-1/+159
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* Makefiles: fixed race condition in creation of "grt" directory before main.o ↵Forrest Voight2020-04-241-6/+6
| | | | is put in it (#1260)
* synth-environment: add an optimization. Fix #1258Tristan Gingold2020-04-241-0/+4
| | | | This optimization is important for the control wires to avoid false paths.
* grt-vpi: handle read/write of enums. Fix #1256Tristan Gingold2020-04-241-10/+56
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* vhdl: avoid crash on indexed library declaration.Tristan Gingold2020-04-231-4/+3
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* synth-oper: handle more operations (comparaisons from std_logic_unsigned).Tristan Gingold2020-04-232-15/+18
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* synth-insts: factorize code.Tristan Gingold2020-04-231-16/+17
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* netlists-inference: adjust guard. Fix ghdl/ghdl-yosys-plugin#110Tristan Gingold2020-04-231-1/+9
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* evaluation: weaken error for out of bound static value.Tristan Gingold2020-04-223-9/+12
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* netlists-memories: improve support of memoriesTristan Gingold2020-04-221-46/+50
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* synth: extend purpose of -dm debug option.Tristan Gingold2020-04-221-0/+2
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* synth: support -v option.Tristan Gingold2020-04-223-0/+13
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* synth: ignore signal attribute.Tristan Gingold2020-04-222-0/+9
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* synth-oper: handle dynamic slice in operands. Fix ghdl-yosys-plugin#108Tristan Gingold2020-04-221-7/+18
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* find_top_entity: add location to report errors. Fix #1254Tristan Gingold2020-04-228-45/+62
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* synth: insert resolver to handle multiple drivers to a signal. Fix #1238Tristan Gingold2020-04-221-3/+52
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* netlists: add resolver gate.Tristan Gingold2020-04-223-0/+26
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* netlists: infere tri gate.Tristan Gingold2020-04-223-0/+44
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* synth-context: Use Const_Z gate for 'Z' constants.Tristan Gingold2020-04-221-7/+23
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* synth: add tri gate.Tristan Gingold2020-04-225-2/+64
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* synth: minor refactoring.Tristan Gingold2020-04-223-2/+38
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* synth-stmts: add a limit to the number of iterations. Fix #1242Tristan Gingold2020-04-212-0/+14
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* synth-oper: handle more std_logic_arith."+" operations. Fix #1253Tristan Gingold2020-04-211-17/+19
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* translate: fix handling of nested generic package. Fix #1246Tristan Gingold2020-04-201-8/+13
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* vhdl: allow attribute specifications in protected types. For #1252Tristan Gingold2020-04-205-319/+332
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* types: introduce Direction_Type, which replaces Iir_Direction.Tristan Gingold2020-04-2041-287/+284
| | | | Global renaming.
* synth: avoid a crash while assigning null wires. Fix #1251Tristan Gingold2020-04-201-1/+5
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