| Commit message (Collapse) | Author | Age | Files | Lines | ||
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| * | synth-vhdl_stmts: fix a crash on never triggered PSL assertion. | Tristan Gingold | 2021-08-29 | 1 | -0/+6 | |
| | | | | | For #1832 | |||||
| * | synth: improve result of is_positive | Tristan Gingold | 2021-08-29 | 4 | -10/+15 | |
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| * | netlists-inference: improve location for dff. | Tristan Gingold | 2021-08-29 | 1 | -1/+1 | |
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| * | synth: factorize code to create base instance | Tristan Gingold | 2021-08-28 | 7 | -57/+104 | |
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| * | synthesis.adb: abstract instance_passes | Tristan Gingold | 2021-08-28 | 3 | -23/+34 | |
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| * | synth-environment: add subprograms for signals (preliminary work) | Tristan Gingold | 2021-08-28 | 2 | -5/+110 | |
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| * | synth-memtype: export conversion functions | Tristan Gingold | 2021-08-28 | 2 | -7/+9 | |
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| * | synth: add build2_concat2 and use it for vhdl concat. | Tristan Gingold | 2021-08-28 | 3 | -4/+18 | |
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| * | ghdlsynth: add debug option for elaboration | Tristan Gingold | 2021-08-28 | 2 | -1/+8 | |
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| * | synth-vhdl_decls.adb: add comments | Tristan Gingold | 2021-08-28 | 1 | -0/+4 | |
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| * | vhdl: handle foreign units in libraries and configuration | Tristan Gingold | 2021-08-28 | 3 | -24/+45 | |
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| * | errorout: do not display empty lines | Tristan Gingold | 2021-08-28 | 3 | -1/+14 | |
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| * | netlists-disp_verilog: handle initial value for idff and isignal | Tristan Gingold | 2021-08-28 | 1 | -8/+18 | |
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| * | vhdl-parse: support for-generate in vunits. Fix #1850 | Tristan Gingold | 2021-08-27 | 1 | -2/+10 | |
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| * | synth: do not remove signals with a keep attribute. | Tristan Gingold | 2021-08-27 | 2 | -1/+31 | |
| | | | | | For ghdl/ghdl-yosys-plugin#154 | |||||
| * | std_names: add name keep. | Tristan Gingold | 2021-08-27 | 2 | -1/+3 | |
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| * | netlists-disp_verilog: fix handling of unconnected port | Tristan Gingold | 2021-08-26 | 1 | -3/+1 | |
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| * | ghdlsynth.adb: fix a typo | Tristan Gingold | 2021-08-26 | 1 | -1/+1 | |
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| * | PSL: handle inf in star repeat sequence. Fix #1832 | Tristan Gingold | 2021-08-26 | 9 | -11/+44 | |
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| * | vhdl-evaluation: check integer evaluations fit in base type. Fix #1834 | Tristan Gingold | 2021-08-26 | 2 | -11/+37 | |
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| * | synth: reuse signal name while creating memories. Fix #1838 | Tristan Gingold | 2021-08-25 | 5 | -20/+34 | |
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| * | ortho/gcc: adjust and propagate to all gcc versions the change for #1845 | Tristan Gingold | 2021-08-25 | 6 | -1/+81 | |
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| * | vhdl-sem_types.adb: refine conditions for resolution functions. | Tristan Gingold | 2021-08-25 | 1 | -3/+7 | |
| | | | | | | | | Do not consider that functions with unbounded elements can be a resolution function. For #1844 | |||||
| * | ghdldrv: handle auxbase option in ortho/gcc. Fix #1845 | Tristan Gingold | 2021-08-24 | 2 | -10/+16 | |
| | | | | | | Remove additional option in ghdldrv.adb, automatically set aux_base_name in ortho-lang-9.c | |||||
| * | vhdl-parse.adb: improve error recovery. For #1837 | Tristan Gingold | 2021-08-24 | 1 | -0/+2 | |
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| * | vhdl: remove iir_kind_anonymous_signal_declaration (now unused) | Tristan Gingold | 2021-08-24 | 22 | -463/+198 | |
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| * | vhdl-sem_specs: avoid ownership issue on default map aspect. | Tristan Gingold | 2021-08-24 | 1 | -1/+4 | |
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| * | Rework inertial associations. | Tristan Gingold | 2021-08-23 | 8 | -46/+228 | |
| | | | | | | Fix #1625 Fix #1672 | |||||
| * | trans-chap3: handle (ignore) use clauses in protected types. Fix #1833 | Tristan Gingold | 2021-08-14 | 1 | -1/+2 | |
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| * | vhdl: introduce iir_kind_association_element_by_name | Tristan Gingold | 2021-08-06 | 17 | -392/+482 | |
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| * | trans-chap7: handle strings in static array. Fix #1637 | Tristan Gingold | 2021-08-06 | 1 | -2/+2 | |
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| * | vhdl-sem_expr.adb: check matching subtype of array aggregate elements. | Tristan Gingold | 2021-08-06 | 1 | -31/+67 | |
| | | | | | | When the subtype of the aggregate is not known by the context. Fix #1723 | |||||
| * | trans-chap3: do not create same range_var for enumeration subtype. | Tristan Gingold | 2021-08-06 | 1 | -27/+41 | |
| | | | | | | | As there is not ranges for enumerated type, a range_var was always created for subtypes of enumerated types even if they had the same range. Create the range_var for bool types. | |||||
| * | vhdl: adjust ownership of agrgegate element subtypes. Fix #1419 | Tristan Gingold | 2021-08-05 | 2 | -14/+31 | |
| | | | | | | Disable transfer of array aggregate element subtype ownership, but create the info of aggregate element subtype. | |||||
| * | vhdl-sem_expr: add comments | Tristan Gingold | 2021-08-04 | 1 | -0/+6 | |
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| * | vhdl-sem_expr: check subtype constraint of record aggregate elements. | Tristan Gingold | 2021-08-04 | 1 | -1/+2 | |
| | | | | | For #1419 | |||||
| * | vhdl-disp_tree: disp integer literal value | Tristan Gingold | 2021-08-04 | 1 | -15/+27 | |
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| * | vhdl-sem_expr.adb: build element subtype for aggregate when possible. | Tristan Gingold | 2021-08-03 | 3 | -13/+164 | |
| | | | | | | | | | In case of array aggregate whose element subtype is not bounded, extract it from the aggregate elements. Fix #1055 Fix #1455 | |||||
| * | ghdldrv.adb: use cc (instead of gcc) as linker driver. Fix #1629 | Tristan Gingold | 2021-08-01 | 1 | -1/+1 | |
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| * | vhdl-parse: use if_generate_else_clause for elsif clauses. Fix #1824 | Tristan Gingold | 2021-07-29 | 1 | -1/+1 | |
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| * | vhdl-sem_expr: analyze choices before expressions in array aggregate. | Tristan Gingold | 2021-07-28 | 1 | -22/+39 | |
| | | | | | | Avoid considering expression to be possibly of the type of the aggregate if the choice is an expression. | |||||
| * | vhdl: move check on instantiation name from sem to parse. | Tristan Gingold | 2021-07-28 | 2 | -1/+4 | |
| | | | | | Fix #1823 | |||||
| * | ghdldrv.adb: factorize code (for #1817) | Tristan Gingold | 2021-07-23 | 1 | -68/+57 | |
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| * | ghdldrv.adb: pass option -auxbase to ghdl1. For #1817 | Tristan Gingold | 2021-07-23 | 1 | -1/+14 | |
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| * | vhdl-sem_stmts.adb: avoid a crash when forced analysis. | Tristan Gingold | 2021-07-23 | 1 | -0/+4 | |
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| * | vhdl-utils(free_recursive): only free the name (not the entity) | Tristan Gingold | 2021-07-22 | 1 | -1/+1 | |
| | | | | | Fix #1820 | |||||
| * | oread: add support for debug line decl | Tristan Gingold | 2021-07-20 | 1 | -0/+7 | |
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| * | vhdl-sem_assocs: improve handling of generic types | Tristan Gingold | 2021-07-19 | 1 | -17/+21 | |
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| * | trans-chap9: set line number for gcc. Fix #1817 | Tristan Gingold | 2021-07-19 | 1 | -2/+5 | |
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| * | vhdl-evaluation: handle element attribute. Fix #1818 | Tristan Gingold | 2021-07-17 | 1 | -1/+2 | |
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index : iCE40/ghdl | |
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