iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	synth: refactoring for memidx1.	Tristan Gingold	2019-10-02	3	-32/+47
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*	synth: introduce memidx1	Tristan Gingold	2019-10-02	7	-28/+35
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*	netlists: add memidx1 and memidx2 gates.	Tristan Gingold	2019-10-02	4	-8/+101
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*	synth: fix extract_merge_partial_assigns.	Tristan Gingold	2019-10-02	1	-5/+15
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*	netlists-disp_vhdl: handle Const_Log, add comments, fix assertion.	Tristan Gingold	2019-10-02	3	-1/+28
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*	ghdlsynth: display bugbox in case of unknown exception.	Tristan Gingold	2019-10-02	1	-1/+3
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*	Regenerate ghdlsynth_gates.h	Tristan Gingold	2019-10-02	1	-19/+24
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*	netlists-disp_vhdl: display constant signals connected to user submodules.	Tristan Gingold	2019-10-01	1	-0/+2
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*	synth: handle string subtype defined by a port. Fix #958	Tristan Gingold	2019-10-01	2	-7/+20
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*	synth: fix in extract_merge_partial_assigns.	Tristan Gingold	2019-10-01	2	-3/+10
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*	synth-environment-debug: add dump_partial_assign.	Tristan Gingold	2019-10-01	1	-10/+17
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*	synth: fix a crash on choice by range for aggregate.	Tristan Gingold	2019-10-01	1	-1/+2
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*	synth: add support for integer rem.	Tristan Gingold	2019-10-01	4	-3/+12
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*	synth: handle selected element of const record.	Tristan Gingold	2019-10-01	1	-5/+8
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*	synth: improve support of arrays or arrays. Fix #955	Tristan Gingold	2019-10-01	10	-62/+110
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*	synth: handle range defined by high/low attributes. Fix #956	Tristan Gingold	2019-09-30	1	-2/+2
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*	synth: improve support of * and /. Fix #953	Tristan Gingold	2019-09-30	3	-2/+46
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*	vhdl: recognize div operators.	Tristan Gingold	2019-09-30	2	-0/+27
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*	synth-oper: implement >= and <= for uns/nat. Fix #952	Tristan Gingold	2019-09-30	1	-0/+6
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*	synth-inference: handl 'EXPR and CLK' condition. Fix #951	Tristan Gingold	2019-09-30	1	-2/+17
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*	synth-insts: refactoring.	Tristan Gingold	2019-09-30	1	-40/+32
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*	synth-insts: create net object for input port. Fix	Tristan Gingold	2019-09-30	1	-3/+14
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*	synth: renaming and minor refactoring.	Tristan Gingold	2019-09-30	4	-74/+43
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*	synth: minor refactoring.	Tristan Gingold	2019-09-30	1	-4/+4
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*	synth-expr: minor factorisation.	Tristan Gingold	2019-09-30	1	-25/+19
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*	vhdl-std_package: reduce cascaded error messages.	Tristan Gingold	2019-09-30	1	-0/+1
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*	synth-decls: improve handling of subtype aliases for	Tristan Gingold	2019-09-30	1	-26/+42
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*	synth: check matching bounds for array equality. Fix #947	Tristan Gingold	2019-09-30	3	-4/+56
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*	synth: convert subtype in alias declaration. Fix #946	Tristan Gingold	2019-09-30	1	-2/+6
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*	synth: handle alias for is_const. Fix #948	Tristan Gingold	2019-09-30	1	-2/+3
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*	synth: handle conversion from slice to unbounded vector.	Tristan Gingold	2019-09-30	1	-0/+2
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*	synth: handle while-loop statement.	Tristan Gingold	2019-09-30	1	-0/+39
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*	synth: special handling of 'const' functions.	Tristan Gingold	2019-09-30	7	-16/+134
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*	synth: slice: avoid crash in case of incorrect slice.	Tristan Gingold	2019-09-30	1	-4/+4
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*	synth: refactoring of alias (allow alias of anything).	Tristan Gingold	2019-09-30	7	-34/+40
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*	synth: handle slice with index from a record.	Tristan Gingold	2019-09-30	1	-5/+15
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*	synth: introduce type_logic	Tristan Gingold	2019-09-29	6	-16/+42
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*	synth: add support of alias of alias. Fix #945	Tristan Gingold	2019-09-28	1	-0/+8
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*	synth: add support for mod operator.	Tristan Gingold	2019-09-28	3	-24/+30
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*	netlists-disp_vhdl: improve disp_x_lit.	Tristan Gingold	2019-09-28	1	-3/+9
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*	synth-environment: optimize cascaded if.	Tristan Gingold	2019-09-28	1	-1/+27
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*	netlists-disp_vhdl: handle id_edge.	Tristan Gingold	2019-09-28	1	-0/+3
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*	synth-stmts: simple optimization for loop control logic.	Tristan Gingold	2019-09-28	1	-10/+19
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*	synth: disp net number in netlists-dump	Tristan Gingold	2019-09-28	1	-1/+13
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*	synth: finalize declarations and free wires.	Tristan Gingold	2019-09-27	6	-21/+214
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*	synth: handle range attribute; handle vhdl08 array subtype.	Tristan Gingold	2019-09-27	1	-19/+25
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*	synth-environment-debug: improve.	Tristan Gingold	2019-09-26	1	-1/+2
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*	synth: handle alias for reshape.	Tristan Gingold	2019-09-26	1	-0/+2
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*	synth: do subtype conversion for variable default	Tristan Gingold	2019-09-26	1	-0/+2
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*	synth: do subtype conversion for expression at calls.	Tristan Gingold	2019-09-26	2	-15/+10
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