| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | synth: improve locations tracking. | Tristan Gingold | 2019-09-18 | 8 | -7/+84 |
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| * | vhdl: add exit/next flags. | Tristan Gingold | 2019-09-18 | 5 | -63/+173 |
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| * | synth: remove value_mux2. | Tristan Gingold | 2019-09-18 | 5 | -55/+32 |
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| * | synth: fix to get_current_assign_value. | Tristan Gingold | 2019-09-17 | 1 | -7/+4 |
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| * | netlists-dump: add width on extract output. | Tristan Gingold | 2019-09-17 | 1 | -5/+14 |
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| * | synth: add debug flag -dc to not clean. | Tristan Gingold | 2019-09-17 | 3 | -1/+9 |
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| * | synth-inference: detect false loop. | Tristan Gingold | 2019-09-17 | 6 | -2/+335 |
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| * | synth: fold addition on constant nets. | Tristan Gingold | 2019-09-17 | 10 | -49/+178 |
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| * | synth: add synth-flags, add debug option -di. | Tristan Gingold | 2019-09-17 | 3 | -1/+32 |
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| * | synth: minor refactoring about const gates. | Tristan Gingold | 2019-09-15 | 4 | -40/+41 |
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| * | synth-oper: add support of std_match | Tristan Gingold | 2019-09-15 | 1 | -0/+94 |
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| * | synth-disp_vhdl: improve support of boolean, suv. | Tristan Gingold | 2019-09-15 | 1 | -17/+16 |
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| * | synth: add build2_const_vec | Tristan Gingold | 2019-09-15 | 2 | -0/+27 |
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| * | synth-stmts: fix uninitialized variable. | Tristan Gingold | 2019-09-13 | 1 | -1/+9 |
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| * | synth: initialize subprogram variables. | Tristan Gingold | 2019-09-13 | 4 | -8/+14 |
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| * | synth: remove get_width from synth-expr | Tristan Gingold | 2019-09-12 | 3 | -15/+2 |
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| * | synth: extract synth-oper from synth-expr | Tristan Gingold | 2019-09-12 | 6 | -927/+1012 |
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| * | synth: handle simple_aggregate. | Tristan Gingold | 2019-09-12 | 1 | -0/+41 |
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| * | synth: allow empty string literal. | Tristan Gingold | 2019-09-12 | 2 | -2/+4 |
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| * | vhdl-nodes: add a comment. | Tristan Gingold | 2019-09-12 | 1 | -1/+1 |
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| * | synth: handle unsigned shift right | Tristan Gingold | 2019-09-11 | 1 | -0/+7 |
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| * | vhdl-ieee-numeric: recognize shift_right. | Tristan Gingold | 2019-09-11 | 1 | -17/+31 |
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| * | synth: handle unsigned shift left. | Tristan Gingold | 2019-09-11 | 5 | -107/+163 |
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| * | synth: add synth_compare_sgn_sgn | Tristan Gingold | 2019-09-11 | 1 | -0/+23 |
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| * | synth: handle constant bit compare. | Tristan Gingold | 2019-09-11 | 1 | -0/+6 |
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| * | synth: handle numeric_std.resize for signed. | Tristan Gingold | 2019-09-11 | 1 | -0/+15 |
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| * | synth: improve support of return statement. | Tristan Gingold | 2019-09-11 | 8 | -21/+117 |
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| * | synth: improve support of negative integer values. | Tristan Gingold | 2019-09-11 | 2 | -15/+29 |
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| * | synth: add const_x gate. | Tristan Gingold | 2019-09-11 | 4 | -1/+27 |
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| * | synth: introduce Seq_Context. | Tristan Gingold | 2019-09-11 | 2 | -68/+87 |
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| * | synth: move synth_user_function_call to synth-stmts. | Tristan Gingold | 2019-09-11 | 3 | -60/+62 |
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| * | synth: improve support of slices. | Tristan Gingold | 2019-09-11 | 1 | -50/+54 |
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| * | synth: introduce slice type. | Tristan Gingold | 2019-09-11 | 4 | -1/+26 |
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| * | synth: Add width field in type_type record. | Tristan Gingold | 2019-09-11 | 6 | -109/+119 |
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| * | synth: handle alias (WIP, read only). | Tristan Gingold | 2019-09-11 | 7 | -12/+86 |
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| * | vhdl: recognize numeric_std shift_left. | Tristan Gingold | 2019-09-11 | 4 | -3/+31 |
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| * | synth: add const_sb32, add smul/umul. | Tristan Gingold | 2019-09-07 | 6 | -13/+105 |
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| * | vhdl: recognize numeric_std mul. | Tristan Gingold | 2019-09-07 | 2 | -0/+27 |
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| * | synth: handle partial assignments in case statements. | Tristan Gingold | 2019-09-07 | 3 | -44/+95 |
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| * | synth-expr: fix regression of issue 7 | Tristan Gingold | 2019-09-06 | 1 | -1/+2 |
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| * | synth: abstract of Merge_Assigns. | Tristan Gingold | 2019-09-06 | 1 | -56/+111 |
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| * | vhdl: fix unused warning on protected variable. | Tristan Gingold | 2019-09-06 | 1 | -0/+1 |
| | | | | | Fix ghdl/ghdl-language-server#27 | ||||
| * | vhdl: handle P32 in connect_scalar. Fix #918 | Tristan Gingold | 2019-09-05 | 1 | -1/+2 |
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| * | synth: handle const record aggregates. | Tristan Gingold | 2019-09-05 | 4 | -21/+64 |
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| * | synth: handle non-constant array aggregates. | Tristan Gingold | 2019-09-05 | 2 | -1/+15 |
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| * | synth: add netlists.concats | Tristan Gingold | 2019-09-05 | 3 | -31/+140 |
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| * | synth: add value_const_array. | Tristan Gingold | 2019-09-05 | 4 | -18/+68 |
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| * | synth-disp_vhdl: handle arrays in disp_out_converter. | Tristan Gingold | 2019-09-05 | 1 | -1/+19 |
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| * | synth: handle const_bit in disp_constant_inline. | Tristan Gingold | 2019-09-04 | 1 | -0/+4 |
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| * | synth: handle large width in get_net. | Tristan Gingold | 2019-09-04 | 2 | -4/+14 |
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index : iCE40/ghdl | |
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