aboutsummaryrefslogtreecommitdiffstats
path: root/src/vhdl
Commit message (Collapse)AuthorAgeFilesLines
...
* vhdl: improve support of subtype attribute. For #641Tristan Gingold2020-06-244-26/+89
|
* synth: handle std_logic_signed.conv_integer. For ghdl/ghdl-yosys-plugin#126Tristan Gingold2020-06-192-79/+88
|
* vhdl: decode to_x01 (from ieee.std_logic_1164)Tristan Gingold2020-06-192-0/+28
|
* vhdl: slightly improve error message for libraries.Tristan Gingold2020-06-191-0/+14
|
* vhdl: add ghdl_integer_index_check_failed. For #1257Tristan Gingold2020-06-178-52/+110
| | | | Improve error message in case of (integer) index not in bounds.
* vhdl/translate: minor refactoring.Tristan Gingold2020-06-173-67/+64
|
* vhdl psl: add support for equivalence operator. Fix #1371Tristan Gingold2020-06-165-53/+79
|
* vhdl: create default configuration for a vunit. Fix #1372Tristan Gingold2020-06-155-392/+474
|
* vhdl-evaluation: handle to_string for floating point types. Fix #1354Tristan Gingold2020-06-131-0/+3
|
* vhdl/translate: simplify some variable assignments. Fix #1361Tristan Gingold2020-06-132-8/+23
| | | | | When the expression is an aggregate of the form (others => X), do not use intermediate variables.
* vhdl: --std93c is now an alias for --std=93 -frelaxedTristan Gingold2020-06-1312-34/+39
| | | | This simplifies the definition of --std=93c
* vhdl-parse: always keep parentheses in case expression. For #1364Tristan Gingold2020-06-132-3/+22
|
* vhdl-sem_expr: use -frelaxed for parentheses aggregates. For #1364Tristan Gingold2020-06-121-14/+39
|
* vhdl: analyze and synth concurrent statements in vunit. Fix #1366Tristan Gingold2020-06-124-15/+35
|
* vhdl: parse statements in verification units.Tristan Gingold2020-06-112-103/+98
|
* vhdl: allows --work between files for -c. Fix #1362Tristan Gingold2020-06-091-19/+37
|
* vhdl: handle aggregates in choices. Fix #1360Tristan Gingold2020-06-092-0/+10
|
* Add PSL built-in prev() function to allowed expressionstmeissner2020-06-071-0/+1
|
* Synthesis of PSL built-in fell() function.tmeissner2020-06-074-1/+58
|
* Synthesis of PSL built-in rose() function.tmeissner2020-06-064-2/+59
|
* Synthesis of PSL stable() function.tmeissner2020-06-064-1/+58
|
* trans-chap8: handle accesses like scalar in return statement.Tristan Gingold2020-06-041-10/+4
| | | | So that stack2 is released if needed.
* trans-chap8: handle stack2 in condition of control statement.Tristan Gingold2020-06-041-14/+43
| | | | | Be sure the stack2 is released if used in the condition of a control statement, as the statement may no execute the normal release of stack2.
* Synthesis of PSL prev function.Tristan Gingold2020-06-029-162/+316
|
* vhdl: parse PSL prev/stable/rose/fell builtin calls. For #662Tristan Gingold2020-06-0213-232/+573
|
* vhdl-utils: minor style changes.Tristan Gingold2020-05-281-4/+2
|
* ortho: add a length parameter to start_array_aggr.Tristan Gingold2020-05-286-59/+44
|
* synth: handle reduction operators. Fix #1342Tristan Gingold2020-05-272-6/+16
|
* vhdl-scanner: makes -C part of -frelaxedTristan Gingold2020-05-251-1/+3
|
* vhdl-nodes: use a flag field for direction.Tristan Gingold2020-05-204-5/+15
|
* synth-decls: handle unbounded record subtypes. Fix #1324Tristan Gingold2020-05-191-12/+13
|
* vhdl-nodes: Rename and move shift/rotate predefined functions. Fix #1325Tristan Gingold2020-05-192-17/+17
|
* vhdl-sem_psl: handle equal/goto repeat seq. Fix #1321Tristan Gingold2020-05-181-1/+3
|
* synth: handle functional call to numeric_std binary operators. For #1313Tristan Gingold2020-05-161-24/+33
|
* trans-chap3: factorize code.Tristan Gingold2020-05-151-11/+1
|
* vhdl-utils: factorize Get_File_Signature.Tristan Gingold2020-05-154-134/+113
|
* vhdl-configuration: handle overrides of slv. Fix #1298Tristan Gingold2020-05-131-1/+15
|
* trans-chap7: add a comment.Tristan Gingold2020-05-131-0/+3
|
* trans-chap5: handle record subtypes in port association.Tristan Gingold2020-05-131-13/+22
| | | | Part of #1300
* trans-chap7: Translate_Equality: also convert to base type for records.Tristan Gingold2020-05-133-26/+51
| | | | For #1300
* vhdl: translate_record_subtype: inherit from parent typeTristan Gingold2020-05-121-18/+24
| | | | (instead of base type). For #1300
* synth: correctly quote nets name in error messages.Tristan Gingold2020-05-091-1/+1
|
* vhdl-sem_psl: handle next_event_a and next_event_e. Fix #1292Tristan Gingold2020-05-091-0/+5
| | | | From T. Meissner.
* Add handling of N_Next_E in PSL semantic passtmeissner2020-05-081-1/+1
|
* vhdl-sem_expr: improve support of vhdl-08 aggregates. Fix #1282Tristan Gingold2020-05-051-24/+37
| | | | An element of an aggregate may have an unconstrained length.
* vhdl-evaluation: handle record equality. For #1283Tristan Gingold2020-05-051-5/+127
|
* vhdl-sem_names: handle deference in create_list_of_types.Tristan Gingold2020-05-021-1/+2
|
* vhdl-sem_expr: fix handling of overload lists in merge_wildcard_type. Fix #1274Tristan Gingold2020-05-021-6/+11
|
* vhdl-sem_expr: fix crash on incorrect aggregate. Fix #1269Tristan Gingold2020-04-281-1/+2
|
* vhdl: fix handling of types name in name attributes. Fix #1268Tristan Gingold2020-04-272-9/+23
|