| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | Initial rework for vhdl 2008 generate statements. | Tristan Gingold | 2015-01-03 | 1 | -37/+75 | |
| * | Rename name_table.name_buffer and name_length to avoid clash. | Tristan Gingold | 2014-12-31 | 1 | -6/+6 | |
| * | Use same node for implicit and explicit subprogram declarations. | Tristan Gingold | 2014-12-15 | 1 | -6/+2 | |
| * | iirs: reduce size of signal_declaration. | Tristan Gingold | 2014-12-14 | 1 | -3/+9 | |
| * | rtis: add source location for blocks and object. Use them in fst dumper. | Tristan Gingold | 2014-12-13 | 1 | -27/+97 | |
| * | Split translation into child packages. | Tristan Gingold | 2014-11-09 | 1 | -0/+2559 | |
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index : iCE40/ghdl | |
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