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path: root/src/vhdl/translate/trans-chap6.adb
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* translate: renaming.Tristan Gingold2017-06-211-2/+2
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* translate: factorize code.Tristan Gingold2017-06-211-2/+1
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* Create default value for ports.Tristan Gingold2017-05-091-63/+133
| | | | Fix #328
* translate: factorize code for function callTristan Gingold2017-02-231-19/+2
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* vhdl08: unbounded records (WIP)Tristan Gingold2017-02-121-7/+5
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* WIP: unbounded records (set record subtype staticness)Tristan Gingold2017-01-311-6/+27
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* translate: WIP for unbounded records.Tristan Gingold2017-01-021-9/+45
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* translate: rename get_array_base to get_composite_baseTristan Gingold2017-01-021-4/+4
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* translate: refactoring for ortho_info_type.Tristan Gingold2016-12-301-2/+2
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* select_name: consider subtype.Tristan Gingold2016-12-131-2/+3
| | | | For #191
* Fix attribute specification with non-static expressionTristan Gingold2016-10-041-3/+14
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* Pass signal values to interfaces. 'sigptr' optimization.Tristan Gingold2015-12-181-58/+137
| | | | Improve simulation speed by about 20%.
* Suppress stack switching; save process state in secondary stack.Tristan Gingold2015-09-041-2/+2
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* Translate: explicitly clean transient types.Tristan Gingold2015-09-021-1/+1
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* Replace fat accesses by bounds accessesTristan Gingold2015-08-291-22/+32
| | | | | translate: separate info for signals from object. Improve some error messages.
* Rework procedure calls, now use a record to pass parameters.Tristan Gingold2015-06-051-18/+17
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* Translation: handle individual association in function call.Tristan Gingold2015-05-201-1/+2
| | | | | | Factorize code. Fix ticket 74.
* Use same node for implicit and explicit subprogram declarations.Tristan Gingold2014-12-151-2/+1
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* Split translation into child packages.Tristan Gingold2014-11-091-0/+1087