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path: root/src/synth/synth-vhdl_context.adb
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* synth: add create_value_net with a pool parameterTristan Gingold2023-04-181-6/+4
* synth: add statement in context, adjust path/instance name attributesTristan Gingold2022-12-311-1/+1
* synth: add value_sig_val to handle individual signal associationsTristan Gingold2022-12-261-1/+2
* synth: infere a dff (instead of an idff) when the init value is XTristan Gingold2022-11-031-5/+18
* synth: fix and add checks for memory management.Tristan Gingold2022-09-101-5/+8
* synth: use areapoolsTristan Gingold2022-09-021-2/+5
* synth-vhdl_context: fix handling of alias in get_net. Fix #2177Tristan Gingold2022-08-141-4/+3
* synth/elab-vhdl_values: add Value_TerminalTristan Gingold2022-07-251-1/+2
* elab-vhdl_values: add Create_Value_QuantityTristan Gingold2022-07-161-0/+2
* synth: add value_dyn_alias in elab-vhdl_valuesTristan Gingold2022-05-251-1/+18
* synth-vhdl_context: resize table before access. Fix #2049Tristan Gingold2022-05-021-6/+14
* synth-vhdl_context: adjust mask. Fix #2011Tristan Gingold2022-03-181-1/+1
* synth: do full elaboration before synthesisTristan Gingold2021-11-011-291/+172
* synth: factorize code to create base instanceTristan Gingold2021-08-281-13/+2
* synth-vhdl_context.adb(Is_Full): consider fractional words.Tristan Gingold2021-06-231-2/+16
* synth: file renaming for decls, expr, insts and stmts.Tristan Gingold2021-04-281-1/+1
* synth: use a generic version of synth-environment.Tristan Gingold2021-04-271-1/+1
* synth: rename synth-context to synth-vhdl_contextTristan Gingold2021-04-161-0/+562