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* synth: rework (again) memory inference.Tristan Gingold2020-02-101-38/+237
* synth: fix a typo in a comment.Tristan Gingold2020-01-181-1/+1
* netlists-memories: fix split of memory content. FixTristan Gingold2020-01-161-4/+131
* netlists-memories: allow initialized rams. For #1090Tristan Gingold2020-01-131-1/+2
* netlists-memories: allow intermediate signals to detect sync read.Tristan Gingold2020-01-121-2/+2
* netlists-disp_vhdl: handle conversion from std_logic to signed/unsigned.Tristan Gingold2019-12-241-6/+8
* netlists-memories: add convert_to_memory.Tristan Gingold2019-12-241-298/+504
* synth: add Get_Input_Instance.Tristan Gingold2019-12-141-10/+8
* netlists-memories: add comments.Tristan Gingold2019-12-141-2/+44
* netlists-memories: remove unused subprograms.Tristan Gingold2019-12-081-318/+0
* netlists-memories: reduce muxes.Tristan Gingold2019-12-081-1/+162
* synth: rework in netlists-memories.Tristan Gingold2019-12-061-61/+128
* netlists-memories: avoid a crash when no read. Fix #1018Tristan Gingold2019-12-051-1/+7
* netlists-memories: improve ROM inference. For issue #1008Tristan Gingold2019-12-051-26/+48
* netlists-memories: generate mem_rd_sync gates.Tristan Gingold2019-12-051-169/+142
* netlists-memories: rework.Tristan Gingold2019-12-051-2/+855
* netlists-memories: do not crash on anonymous ROM.Tristan Gingold2019-11-121-3/+6
* netlists: optimize trunc.Tristan Gingold2019-11-111-1/+3
* netlists-memories: truncate wide addresses.Tristan Gingold2019-11-051-11/+9
* netlists-memories: adjust message.Tristan Gingold2019-11-051-1/+1
* synth: fix multiport read memories (for issue #1000)Tristan Gingold2019-11-031-1/+3
* netlits: fix memidx order.Tristan Gingold2019-11-011-1/+3
* synth: adjust computation of max for dyn_extract.Tristan Gingold2019-10-281-4/+2
* nelists-memories: reject memories with reset.Tristan Gingold2019-10-211-1/+4
* netlists-memories: fixes in ROM.Tristan Gingold2019-10-201-48/+51
* netlists-memories: preliminary work to handle ROM.Tristan Gingold2019-10-201-111/+194
* synth: use note messages for memories (instead of warnings).Tristan Gingold2019-10-191-27/+21
* netlists-memories: check ports.Tristan Gingold2019-10-181-7/+161
* synth: add netlists-memories to extract memories. Still WIP.Tristan Gingold2019-10-171-0/+500