iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	netlists-cleanup: do not remove self-assigned output gate	Tristan Gingold	2021-05-07	1	-23/+30
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*	netlists: do not remove net gates that have an attribute	Tristan Gingold	2021-03-17	1	-21/+24
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*	update license headers	umarcor	2021-02-05	1	-5/+3
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*	netlists-cleanup: do not remove user sub modules. Fix #1454	Tristan Gingold	2020-09-05	1	-3/+7
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*	netlits: Use Remove_Instance instead of Free_Instance.	Tristan Gingold	2020-05-18	1	-1/+3
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*	synth: add support for sequential assertions. Fix #1273	Tristan Gingold	2020-05-06	1	-3/+4
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*	netlists: add id_nop gate.	Tristan Gingold	2020-03-22	1	-1/+2
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*	netlists-cleanup: avoid a warning.	Tristan Gingold	2020-03-10	1	-0/+1
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*	synthesis: handle initialized output ports.	Tristan Gingold	2020-03-07	1	-0/+7
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*	netlists-cleanup: refactoring.	Tristan Gingold	2020-02-18	1	-12/+17
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*	synth: handle component with ports in different order.	Tristan Gingold	2020-02-13	1	-12/+16
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*	synth: remove remaining clock edge gates after memories.	Tristan Gingold	2020-02-10	1	-0/+24
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*	synth: rework (again) memory inference.	Tristan Gingold	2020-02-10	1	-0/+2
\| \| \| \| \| \|	Preliminary work to support multi-clock memories. Strengthen and fix fallout of Check_Connected. Rename synth.inference to netlists.inference.
*	netlists: use a mark and sweep cleanup.	Tristan Gingold	2020-01-15	1	-0/+119
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*	synth-cleanup: avoid a crash on undriven output. Fix #1078	Tristan Gingold	2020-01-11	1	-3/+5
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*	netlists: add remove_output_gates.	Tristan Gingold	2019-12-05	1	-0/+27
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*	netlists-cleanup: add comments.	Tristan Gingold	2019-11-13	1	-1/+7
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*	netlists-cleanup: do not remove the self-instance.	Tristan Gingold	2019-11-06	1	-0/+2
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*	synth: rewrite cleanup pass.	Tristan Gingold	2019-10-10	1	-0/+107