| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | netlists: add assume gate. | Tristan Gingold | 2019-07-04 | 1 | -0/+2 | |
| * | synth: handle concurrent assertions. | Tristan Gingold | 2019-07-02 | 1 | -0/+3 | |
| * | synth: add dyn_insert module. | Tristan Gingold | 2019-07-01 | 1 | -2/+5 | |
| * | synth: add syn_extract for dynamic slices. | Tristan Gingold | 2019-06-28 | 1 | -1/+6 | |
| * | synth: add insert gate. | Tristan Gingold | 2019-06-24 | 1 | -0/+4 | |
| * | synth: use only one edge gate, make it fully abstract. Handle falling_edge. | Tristan Gingold | 2019-05-22 | 1 | -5/+2 | |
| * | synth: add adff, iadff. | Tristan Gingold | 2019-04-16 | 1 | -0/+9 | |
| * | Add netlist generation infrastructure. | Tristan Gingold | 2017-01-31 | 1 | -0/+120 | |
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index : iCE40/ghdl | |
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