| Commit message (Expand) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | synth: introduce memidx1 | Tristan Gingold | 2019-10-02 | 1 | -8/+6 | |
| * | netlists: add memidx1 and memidx2 gates. | Tristan Gingold | 2019-10-02 | 1 | -0/+77 | |
| * | synth: add support for integer rem. | Tristan Gingold | 2019-10-01 | 1 | -0/+3 | |
| * | synth: improve support of arrays or arrays. Fix #955 | Tristan Gingold | 2019-10-01 | 1 | -4/+4 | |
| * | synth: improve support of * and /. Fix #953 | Tristan Gingold | 2019-09-30 | 1 | -0/+6 | |
| * | synth: add support for mod operator. | Tristan Gingold | 2019-09-28 | 1 | -2/+7 | |
| * | synth: rework type for expression. | Tristan Gingold | 2019-09-25 | 1 | -1/+3 | |
| * | synth: handle rotate. | Tristan Gingold | 2019-09-22 | 1 | -10/+14 | |
| * | synth: Add support for PSL cover directive (#930) | T. Meissner | 2019-09-19 | 1 | -3/+20 | |
| * | synth: remove value_mux2. | Tristan Gingold | 2019-09-18 | 1 | -3/+5 | |
| * | synth: add build2_const_vec | Tristan Gingold | 2019-09-15 | 1 | -0/+18 | |
| * | synth: allow empty string literal. | Tristan Gingold | 2019-09-12 | 1 | -1/+0 | |
| * | synth: handle unsigned shift left. | Tristan Gingold | 2019-09-11 | 1 | -0/+26 | |
| * | synth: add const_x gate. | Tristan Gingold | 2019-09-11 | 1 | -0/+18 | |
| * | synth: add const_sb32, add smul/umul. | Tristan Gingold | 2019-09-07 | 1 | -2/+53 | |
| * | synth: remove insert gate. | Tristan Gingold | 2019-08-31 | 1 | -38/+0 | |
| * | synth: improve synth_uresize. | Tristan Gingold | 2019-08-31 | 1 | -1/+22 | |
| * | synth: add support for record types. | Tristan Gingold | 2019-08-29 | 1 | -0/+10 | |
| * | synth: set name to assert/assume gates. | Tristan Gingold | 2019-08-20 | 1 | -4/+17 | |
| * | synth: set location on assume/assert gates. | Tristan Gingold | 2019-08-20 | 1 | -2/+4 | |
| * | synth: handle signed integer comparisons (#878) | Pepijn de Vos | 2019-08-01 | 1 | -0/+10 | |
| * | synth: add support for memories. | Tristan Gingold | 2019-07-29 | 1 | -1/+43 | |
| * | synth: remove bounds (unused) for ports. | Tristan Gingold | 2019-07-22 | 1 | -4/+2 | |
| * | synth: rework names. | Tristan Gingold | 2019-07-22 | 1 | -2/+3 | |
| * | synth: add concatn gate | Tristan Gingold | 2019-07-19 | 1 | -0/+24 | |
| * | synth: add const_z gate. | Tristan Gingold | 2019-07-19 | 1 | -2/+21 | |
| * | synth: add > and >= operators (#870) | Pepijn de Vos | 2019-07-16 | 1 | -0/+5 | |
| * | synth: add Id_Port gate to improve display. | Tristan Gingold | 2019-07-10 | 1 | -3/+21 | |
| * | netlists: export new_internal_name. | Tristan Gingold | 2019-07-04 | 1 | -4/+10 | |
| * | netlists: allow to build idff without a connected D. | Tristan Gingold | 2019-07-04 | 1 | -3/+5 | |
| * | netlists: add reduce_or/reduce_and gates. | Tristan Gingold | 2019-07-04 | 1 | -0/+16 | |
| * | netlists: add assume gate. | Tristan Gingold | 2019-07-04 | 1 | -3/+22 | |
| * | synth: handle concurrent assertions. | Tristan Gingold | 2019-07-02 | 1 | -0/+21 | |
| * | synth: fix Idff; fix 'edge and enable'. | Tristan Gingold | 2019-07-02 | 1 | -1/+1 | |
| * | synth: add dyn_insert module. | Tristan Gingold | 2019-07-01 | 1 | -4/+47 | |
| * | netlists: fix pasto in builders. | Tristan Gingold | 2019-07-01 | 1 | -1/+1 | |
| * | synth: add types_utils package. | Tristan Gingold | 2019-07-01 | 1 | -0/+1 | |
| * | synth: add ule, fix gate number. | Tristan Gingold | 2019-06-30 | 1 | -0/+5 | |
| * | synth: add syn_extract for dynamic slices. | Tristan Gingold | 2019-06-28 | 1 | -3/+46 | |
| * | synth: add insert gate. | Tristan Gingold | 2019-06-24 | 1 | -0/+38 | |
| * | synth: handle ult comparison. | Tristan Gingold | 2019-06-23 | 1 | -0/+3 | |
| * | synth: added support for numeric_std unary negation | Christos Gentsos | 2019-06-06 | 1 | -0/+2 | |
| * | synth: use only one edge gate, make it fully abstract. Handle falling_edge. | Tristan Gingold | 2019-05-22 | 1 | -15/+5 | |
| * | synth: add adff, iadff. | Tristan Gingold | 2019-04-16 | 1 | -0/+65 | |
| * | synth: support nand, nor, xnor. | Tristan Gingold | 2017-02-26 | 1 | -0/+7 | |
| * | Add netlist generation infrastructure. | Tristan Gingold | 2017-01-31 | 1 | -0/+649 | |
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index : iCE40/ghdl | |
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